IC Layout Engineering Intern m/f/d

Do you study engineering and want to apply your skills and knowledge in the advanced field of Integrated Circuits? Do you like to solve geometrical puzzles?  Have you found yourself immersed in navigating game mazes and labyrinths, carefully mapping their pathways and connections in your mind?  If you answered yes to these questions – this internship might be for you!

Our challenging analog and mixed signal designs are used in systems that drive the energy transformation – from photo-voltaic to electrical mobility.  We use proprietary advanced BiCMOS process technologies and achieve best in industry performance with innovative design and careful attention to details.

In this internship you will work together with experienced layout engineers and design team to learn and implement layout of analog and mixed signal integrated circuits. 

Please note that this position is not in analog design, but in IC Layout.  If you are a Masters student with knowledge and interest in Analog Design – please apply for TI’s Design Internships.
 

Physical layout and layout verification of high-performance analog and mixed signal circuits in BICMOS technologies. 

• Learn analog layout implementation flow using Cadence Virtuoso XL
• Transistor level layout of analog specific blocks
• Acquire experience in analog layout matching technique and define block level matching requirements in collaboration with design engineer
• Floor planning, align block level definition with top level requirement
• Layout verification (Design Rule Check, Layout vs. Schematic)
• Understand database structure and revision control system
• Learn about the complete design flow of an IC until mask generation

• Completed 4 or 5 semesters of Bachelor study in Electrical or Computer Engineering

• Track record of on-time completion of technical projects

• Experience working in team

• Highly self-motivated with good communication and teamwork skills

• Willing to learn and accomplish tasks independently

• Basic knowledge and understanding of semiconductor technology and electronics

• Experience with LINUX, scripting and programming

• Knowledge of IC layout tools (Cadence IC Design Suite) is strong plus

• Good troubleshooting and debugging skills

• Good English in word and writing, German is a plus as well