118-WW TMG MFG OPS1d ago
New
New
RET Layout/Mask Engineer
United States·DallasmidOtherEngineer
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Quick Summary
Key Responsibilities
Create layouts for setup, evaluation, and monitor of lithography/etch wafer processes. Work with fabrication process engineering and integration teams to determine specifications.
Requirements Summary
Bachelors in Electrical Engineering, Physics, Computer Science, Chemistry or related degree Proficiency with EDA layout tools (Cadence suite, Synopsys, etc.) and scripting (e.g., Python, SKILL,
Technical Tools
OtherEngineer
Responsibilities
~1 min read- →Bachelors in Electrical Engineering, Physics, Computer Science, Chemistry or related degree
- →Proficiency with EDA layout tools (Cadence suite, Synopsys, etc.) and scripting (e.g., Python, SKILL, Perl)
- →5+ years of experience in Layout/Mask design.
Requirements
~1 min read- Hands-on experience in design or PDK development with direct experience at a semiconductor company
- Excellent problem-solving, analytical, and communication skills for cross-team collaboration
- Experience working with PG flows
- Strong lithography knowledge
- OPC experience
Location & Eligibility
Where is the job
Dallas, United States
On-site at the office
Who can apply
US
Listing Details
- Posted
- June 15, 2026
- First seen
- June 15, 2026
- Last seen
- June 16, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 51%
- Scored at
- June 15, 2026
Signal breakdown
freshnesssource trustcontent trustemployer trust
External application · ~5 min on 118-WW TMG MFG OPS's site
Please let 118-WW TMG MFG OPS know you found this job on Jobera.
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