Product Test Engineer
Quick Summary
Lattice OverviewThere is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results,
Responsibilities
~3 min readResponsibilities• Develop test plans using established methodologies targeted on chip IP functions and features.• Design and implement test circuits using FPGA fabric and embedded IP using Lattice’s proprietary design SW.• Develop scripts to automate test generation and own Pre-Si verification of content to ensure Si readiness.• Execute Post-Si pattern validation using wafer-level ATE, package-level ATE, and package-level bench platforms across process, temperature, and voltage conditions.• Identify and analyze to root cause product marginalities, communicating and coordinating root cause closure to appropriate cross-functional team (eg. Applications Engineering, Design Engineering, etc.)• Take ownership of IP content development and drive any issues to resolution.• Plan and execute test content delivery to meet or exceed schedules required for internal and external customers samples.• Extract coverage metrics of test patterns using fault grading and review for coverage improvements.
Required Skills• BS degree (Electrical, Electronics or Computer Engineering) with 8 years of industry experience, or• MS degree (Electrical, Electronics or Computer Engineering) with 6 years of industry experience• Good working knowledge of semiconductor devices and test methodologies• Experience in ATE test program development, integration and debug on Nextest Magnum, Advantest T2K or Teradyne UltraFLEX preferred.• Experience in IC characterization and/or failure analysis using various bench tools (i.e. Oscilloscope, Pattern Generators, Data Timing Generator, Multimeters, etc)• Experience with WAT/etest, wafer sort, package assembly, final test (i.e. full backend IC process)• Experience in Programmable Logic is desired• Experience in RTL Design, Design Verification an advantage• Knowledge in test, DFT methodologies (ie. scan, BIST), memory test, and fault grade methodologies an advantage• Knowledge in Hardware Description Language such as Verilog or VHDL an advantage• Knowledge in programming languages (ie. Python, C++)• Excellent verbal and written skills. Demonstrated ability to work with multiple groups and across cultures• Good analytical and problem-solving abilities• Strong Windows, Unix, and MS Office skills• Curious with strong self-motivation to learn and explore
Location & Eligibility
Listing Details
- Posted
- May 28, 2026
- First seen
- June 13, 2026
- Last seen
- June 13, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 16%
- Scored at
- June 13, 2026
Signal breakdown
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