Quick Summary
About Etched Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200.
Develop FEA models for CoWoS-based IC packages using ANSYS Mechanical APDL Perform thermo-mechanical stress/strain analysis and thermal cycling simulations Analyze package warpage, solder joint reliability, and interconnect stress Develop CFD models…
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
We are seeking a talented Thermo-Mechanical, CFD Simulation Engineering Intern focused on Chip-on-Wafer-on-Substrate (CoWoS) package development to join our Advanced IC Packaging Team in Fall '26, Spring '27, or Summer '27. You'll use tools like ANSYS Mechanical APDL and ANSYS FLUENT to perform critical thermo-mechanical/CFD analysis and contribute to next-generation high-performance computing systems.
Responsibilities
~1 min read- →
Develop FEA models for CoWoS-based IC packages using ANSYS Mechanical APDL
- →
Perform thermo-mechanical stress/strain analysis and thermal cycling simulations
- →
Analyze package warpage, solder joint reliability, and interconnect stress
- →
Develop CFD models using ANSYS FLUENT for solder reflow modeling
- →
Collaborate with design engineering teams on package development
Pursuing a degree in Mechanical Engineering or related field
Academic or project experience with FEA/CFD tools and analysis
Proficiency in SOLIDWORKS/NX, ANSYS Mechanical APDL and ANSYS FLUENT
Understanding of semiconductor packaging materials and processes
Strong grasp on non-linear properties of materials (elastic-plastic, viscoelastic)
Familiarity with CoWoS-S/L/R, TSVs, or 2.5D/3D integration concepts
Basic programming/scripting skills (APDL, Python, MATLAB)
Knowledge of solder joint reliability and failure analysis
Familiarity with JEDEC standards and reliability testing
Previous internship in semiconductor industry
We encourage you to apply even if you do not believe you meet every qualification.
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com.
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.
Location & Eligibility
Listing Details
- Posted
- April 24, 2026
- First seen
- May 6, 2026
- Last seen
- July 3, 2026
Posting Health
- Days active
- 68
- Repost count
- 0
- Trust Level
- 15%
- Scored at
- July 14, 2026
Signal breakdown
Please let etched know you found this job on Jobera.
4 other jobs at etched
View all →Explore open roles at etched.
Browse Similar Jobs
Stay ahead of the market
Get the latest job openings, salary trends, and hiring insights delivered to your inbox every week.
No spam. Unsubscribe at any time.