Principal FPGA Engineer
Quick Summary
Architect a massively parallel,
Bachelor’s degree in computer engineering, electrical engineering, computer science,
Freeform builds AI-native manufacturing systems that unify software, hardware, and physics to produce industrial-scale parts at the speed of human ideation. By treating manufacturing as a single integrated system, we unlock a new era of innovation where complex hardware is designed, built, and scaled without limits.
As a Principal FPGA Engineer at Freeform, you will architect and lead development of our next-generation compute platform, a distributed system of hundreds of FPGAs orchestrating many dozens of high-power lasers in real time. This is not a standard FPGA role. You will be pushing the boundaries of what’s physically possible with reconfigurable compute: processing hundreds of thousands of frames per second through a real-time ML inference pipeline, with latency budgets that leave no margin for error. You will leverage cutting-edge silicon including the Xilinx Zynq Ultrascale+ MPSoC, and tightly couple FPGA fabric with state-of-the-art GPUs to build one of the most demanding heterogeneous computing platforms in existence.
We are pioneering the use of FPGAs for real-time machine learning in an industrial manufacturing context, a space where almost no prior art exists. This is core IP work at the frontier of what FPGA-based computing can do, and it sits at the heart of what makes Freeform’s technology unlike anything else in the world.
3D printing experience is not required to be successful here - rather we look for smart, motivated, collaborative engineers who love solving hard problems and creating amazing technology!
Responsibilities
~1 min read- →Architect a massively parallel, ultra-low latency FPGA pipeline capable of processing hundreds of thousands of frames per second across a fleet of hundreds of FPGAs
- →Lead cross-disciplinary engineering efforts spanning software, electrical, and process engineering to co-develop and continuously advance FPGA capabilities at the system level
- →Design and implement real-time ML inference capability directly on FPGA fabric, one of the most demanding and least-explored frontiers in reconfigurable computing
- →Develop novel RTL components and IP blocks that push the limits of timing closure, resource utilization, and deterministic latency
- →Implement high-performance signal processing algorithms on FPGA, including custom arithmetic, filtering, and feature extraction at line rate
- →Design deterministic, microsecond-precision controllers for high-power laser systems operating under strict real-time constraints
Requirements
~1 min read- Bachelor’s degree in computer engineering, electrical engineering, computer science, or related field
- 15+ years of FPGA development experience in SystemVerilog or VHDL
- Familiarity with Xilinx Vivado/Vitis toolchain development environment
- Experience with high-speed IO, board bring up, and similar hardware-centric FPGA development domains
Nice to Have
~1 min read- Master’s degree in computer engineering, electrical engineering, computer science, or related field
- Experience with image processing or DSP
- Experience with Xilinx Zynq Ultrascale+ MPSoC
- Experience with embedded software development including embedded Linux and System on Chip (SoC)-based architectures
- Experience implementing math/advanced computations on FPGAs
- Experience with heterogeneous computing platforms and high-speed data acquisition systems
- Familiarity with C/C++ or other high-level programming languages
- Excellent verbal and written communication skills
- Creative thinker able to apply first-principles reasoning to solve complex problems
- Based in Hawthorne, our vertically integrated facility brings technology development, R&D, and production together under one roof. We operate at the center of LA’s deep tech ecosystem, surrounded by some of the most ambitious hardware innovation happening anywhere in the country.
- Our fast-paced, cross-functional environment is built on close collaboration, and as such, this role requires full-time onsite presence (five days a week), with very limited exceptions.
What We Offer
~2 min readLocation & Eligibility
Listing Details
- Posted
- June 10, 2026
- First seen
- June 10, 2026
- Last seen
- June 11, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 67%
- Scored at
- June 10, 2026
Signal breakdown
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