Design Verification Engineer | Sensing
OtherDesign Verification Engineer
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Quick Summary
Requirements Summary
Masters degree in Electrical Engineering or related field. 3+ years of related experience. Strong hands on working experience in Digital/AMS verification for Mixed-signal chips.
Technical Tools
OtherDesign Verification Engineer
Responsibilities
~1 min read- →Masters degree in Electrical Engineering or related field.
- →3+ years of related experience.
- →Strong hands on working experience in Digital/AMS verification for Mixed-signal chips.
- →Strong programming skills using SystemVerilog in verification.
- →Robust in verification approach and strong in fundamentals of DV flows and concepts.
- →SystemVerilog and class-based verification knowledge.
Requirements
~1 min read- Experience in writing an exhaustive verification plan from the specs.
- Experience in chip-level testcases in SystemVerilog.
- Experience in metric-based Verification closure using Code and Functional coverage.
- Experience in random/constrained random verification.
- Experience with Cadence simulation and debug tools.
- Experience with UART, SPI, I2C communication protocols.
- Good in debugging skills.
- Ability to work independently and self-driven/motivated person.
Location & Eligibility
Where is the job
Dallas, United States
On-site at the office
Who can apply
US
Listing Details
- Posted
- July 22, 2026
- First seen
- July 22, 2026
- Last seen
- September 29, 2026
Posting Health
- Days active
- 68
- Repost count
- 0
- Trust Level
- 19%
- Scored at
- September 29, 2026
Signal breakdown
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External application
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