Senior FPGA Engineer

3Brain is a Swiss deep tech company working on cell-electronic interfaces that link biological networks to computers via custom-made semiconductor microchips. Our mission is to empower life scientists to probe intelligent networks, accelerate biomedical discoveries for the benefit of patients, and create a future more exciting than the present. Our interdisciplinary team of scientists and engineers are constantly pushing the boundaries of engineering for life’s complexities. We are ambitious, fast-growing and love to explore. The company’s cutting-edge products are used in laboratories and pharma companies worldwide. 3Brain is headquartered in Switzerland nearby Zurich, has a Discovery Unit and production site in Genova, Italy, and an operational unit in the US.

3Brain is looking for a full-time Senior FPGA engineer to reinforce our R&D team. You will help develop new embedded systems for high-speed data acquisition devices and improve and maintain the existing product line. You will be responsible for fetching data from high speed ADCs or to stream to high-speed DACs. You will design IP cores for complex signal processing and hardware accelerators. You will also provide the necessary FPGA infrastructure to communicate with hardware peripherals (SPI, UART, I2C, etc.).

In particular, your tasks involve:

• Developing FPGA projects with Intel Quartus and Xilinx Vivado.
• Designing FPGA modules for high‑speed data acquisition (Gbps‑rate LVDS), data transmission (USB, Ethernet, PCIe, CameraLink), and real‑time processing using HDL (VHDL, Verilog, SystemVerilog), supported by self‑checking testbenches.
• Integrating FPGA modules for peripheral control (SPI, UART, I2C, etc.).
• Embedded software development for FPGA (C/C++/Linux).
• Maintenance of the existing code base.

• BSc/MSc in Electrical Engineering or similar.
• 5 Years or more of experience in FPGA development and HDL coding.
• FPGA development tools such as Intel Quartus or Xilinx Vivado.
• FPGA timing constraints with Synopsys Design Constraints (.sdc).
• Knowledge of embedded systems/systems on chip.
• Commitment to high coding and design standards and best practices.
• Basic understanding of electronics.
• Fluency in English.
• Initiative and independence.

• PhD in Electrical Engineering or similar.
• Project/people management skills.
• Proficiency with VHDL-2008, OSVVM, UVVM, VUnit.
• Proficiency in embedded software programming C/C++.
• Knowledge of the Linux operating system for embedded devices.
• Proficiency in Python programming.
• Background in signal processing.