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Principal ASIC Design Engineer

United StatesUnited States·BoulderFull-timelead
OtherAsic Design Engineer
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Quick Summary

Overview

At Atom Computing, we build quantum computers using arrays of optically trapped neutral atoms that will empower customers to achieve unprecedented computational breakthroughs.

Technical Tools
OtherAsic Design Engineer

At Atom Computing, we build quantum computers using arrays of optically trapped neutral atoms that will empower customers to achieve unprecedented computational breakthroughs. Join a world-class team of scientists, engineers, and business professionals to advance the state-of-the-art in quantum computing. 

Atom Computing is seeking a Principal ASIC Designer to oversee the development of critical technologies that power our quantum computers. In this role, you will own end-to-end design strategy—from requirements definition through silicon bring-up—while driving critical trade-off decisions across performance, power, area, and system integration constraints. You will partner closely with customers and cross-functional teams to translate evolving requirements into production-ready designs, ensuring alignment between technical execution and business objectives. As a senior technical leader, you will provide strategic guidance to executive stakeholders, shaping the long-term silicon roadmap and influencing key investment decisions. This position requires deep expertise in ASIC development and strong systems thinking. 

Due to the need for collaboration with Atom’s theory, software, hardware and optics teams, this role is required to be in the office in Boulder, CO or Austin, TX at least 3 days per week. 

  • Establish ASIC design processes internal to Atom Computing by defining methodologies across architecture, RTL, verification, and tapeout.
  • Support hiring and mentoring a small team of ASIC engineers as required to implement the products. 
  • Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration.
  • Manage schedules and vendor interfaces by coordinating milestones, aligning with ASIC partners, and ensuring successful fabrication.
  • Work closely with Atom Computing’s quantum physicists, optical engineers, hardware and software engineers to understand use cases and deliver hardware that addresses the needs. 
  • Manage the product roadmap and subsystem delivery schedules supporting both commercial and research projects. 
  • Participate in the design and development of current FPGA designs. Influence the FPGA design and development process to prepare for ASIC design.
  • MS or PhD in Electrical Engineering, or related field.
  • 10+ years of post-degree experience as a hardware engineer. 
  • Have gone through 2 or more complete ASIC design cycles.
  • Experience porting designs from FPGA prototypes to ASICs
  • Proficiency with RTL (SystemVerilog preferred)
  • Experience in implementing large digital signal processing blocks in RTL
  • Working knowledge of performance and limitations of ASIC fabs, partners, and design nodes as well as FPGA capabilities to guide selection of best fit for our applications
  • Knowledge of Cadence, Synopsys, or Siemens EDA design tools
  • Expertise in FPGA, microprocessor, and related digital circuit design and functions
  • Mixed signal design experience
  • Atom Computing provides a wide variety of perks and benefits, including fully paid medical, dental, and vision insurance for our employees and their dependents. Additionally, unlimited paid time off, 401K company matching, short- and long-term disability, FSA, dependent care benefits, and life insurance.  We also offer drinks, snacks, and catered team lunches in our offices, every day!

    The base salary range for this position is between $180,000 - $220,000, commensurate with experience. In addition to salary, we offer an annual bonus and equity in the company.

    Location & Eligibility

    Where is the job
    Boulder, United States
    Hybrid — some on-site time required
    Who can apply
    US

    Listing Details

    Posted
    June 24, 2026
    First seen
    June 24, 2026
    Last seen
    June 24, 2026

    Posting Health

    Days active
    0
    Repost count
    1
    Trust Level
    56%
    Scored at
    June 24, 2026

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    Principal ASIC Design Engineer