Staff Engineer- AMS Verification

#WeAreIn to make sure that our circuits are designed to perfection. Are you in? Play a key role in the development and implementation of advanced System Verilog real-number modelling methodologies for analog/mixed-signal(AMS) verification, optimizing speed and accuracy trade-offs for pre-silicon validation. Your role Key responsibilities in your new role Play a key role in the development and implementation of advanced System Verilog real-number  modelling methodologies  for  analog/mixed-signal(AMS) verification,  optimizing speed and accuracy trade-offs for pre-silicon validation Collaborate with design and verification teams to define and refine functional verification plans for AMS blocks, ensuring proper integration into complex  System-on-Chip (SoC) architectures Develop and maintain custom verification frameworks that incorporate mixed-signal and digital simulation environments using industry-leading tools such as  Xcelium and VCS Create, validate, and deploy behavioral models  (VerilogAMS,SystemVerilog ) for AMS components, ensuring compatibility with the digital verification environment and system-level requirements Identify bottlenecks in current AMS verification flows and proposeinnovative solutions to enhance efficiency, scalability, and coverage Provide technical mentorship and training to junior engineers, fostering expertise in AMS verification techniques and best practices Your profile Qualifications and skills to help you succeed  A highly motivated AMS Verification Engineer with strong debugging and problem-solving skills, capable of driving verification excellence for advanced mixed-signal and SoC designs while working effectively in cross-functional global teams Proven experience in AMS verification for complex SoCs and subsystem-level designs. Strong proficiency in mixed-signal simulation environments using Cadence, Synopsys, or Mentor Graphics tool suites Solid understanding of digital design methodologies , Verilog HDL, RTL design practices, and analog circuit fundamentals; prior analog design experience is an advantage Hands-on experience with behavioral modeling , including Verilog-D, Verilog-A, and Verilog-AMS Exposure to SystemVerilog (SV) and UVM testbench development and enhancement from a mixed-signal verification perspective is desirable Strong functional knowledge of analog and mixed-signal building blocks, including comparators, op-amps, switched-capacitor circuits, ADCs, DACs, current mirrors, charge pumps, regulators, and clocking circuits Understanding of power management architectures, data converters, and analog functional specifications ; loop analysis knowledge is a plus Working knowledge of scripting languages such as Python, Perl, Tcl, SKILL , or equivalent automation tools Demonstrated ability to lead technical projects , collaborate across global teams, and thrive in a multi-site development environment Experience with industry-standard AMS verification tools, including: Cadence Xcelium + Spectre Synopsys XA-VCS Mentor Eldo ADMS #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.  Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon.