Senior Silicon Logical Design Engineer - Bengaluru

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. 

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies.

Working within the logical design team, the silicon logical design engineer is responsible for a wide range of logical design tasks. The team is responsible for delivering the Microarchitecture and RTL design to implement the chip architecture specification for Graphcore Silicon, working closely with other engineers within the Silicon team. The successful candidate will be responsible for helping the team deliver high quality micro-architecture and RTL for Graphcore chips, working within the logical design team and with the broader Silicon team to ensure we meet the company objectives for Silicon delivery. 

• →Integrate IP and subsystems into top-level SoC designs
• →Develop and maintain build and configuration environments
• →Perform synthesis, linting, CDC/RDC, and timing checks at the SoC level
• →Support verification and physical design teams through clean interface hand-offs
• →Debug and resolve integration-related issues across multiple hierarchies
• →Contribute to the continuous improvement of integration flows and automation
• →Producing high quality microarchitecture and other documentation
• →Ensure good communication between sites to maintain consistent working practises

• Logical design experience in relevant industry
• Experience range 4-8 years in Semiconductor Industry/Product development exposure.
• Be highly motivated, a self-starter, and a team player
• Ability to work across teams and debugging issues seen to find root causes
• Degree in Computer Science, Engineering or related subject
• Ability to script in Python and/or TCL for automation and to solve design issues
• SystemVerilog
• Knowledge of digital design flows

• Processor design
• Application specific blocks
• High-speed serial interfaces
• Complex third-party IP integration
• Arithmetic pipeline design
• Floating-point design
• Design for test
• Synthesis
• Timing Analysis
• Project Planning
• Power Integrity
• Silicon transistor