SK hynix memory solutions America Inc.2mo ago

ASIC Digital Design Intern

United States·San Joseentry

OtherDigital Design

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Quick Summary

Overview

About the Company: At SK Hynix Memory Solution, we're at the forefront of semiconductor innovation, developing advanced memory solutions that power everything from smartphones to data centers.

Technical Tools

OtherDigital Design

Responsibilities

~1 min read

→Assist engineers with basic RTL review, organization, and simple modifications (Verilog/SystemVerilog).
→Support Design-for-Test (DFT) activities such as scan chain checks, test structure integration, and report analysis.
→Help run synthesis and timing analysis flows using established scripts and tools.
→Review synthesis and static timing analysis (STA) reports to identify simple issues (e.g., setup/hold violations).
→Assist in debugging design and timing issues under guidance from senior engineers.
→Help maintain scripts, documentation, and design checklists.
→Collaborate with team members across design, verification, and physical design.

Requirements

~1 min read

Pursuing a Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
Basic understanding of digital logic (gates, flip-flops, timing concepts).
Familiarity with Verilog or SystemVerilog from coursework (no advanced design experience required).
Willingness to learn ASIC design flows, tools, and methodologies.
Strong attention to detail and ability to follow structured workflows.

Introductory exposure to DFT concepts (scan, basic test ideas) through coursework or projects.
Basic understanding of timing concepts (setup/hold, clock signals).
Familiarity with Linux/Unix environments.
Exposure to scripting (Python, Tcl, or Shell) is a plus but not required.

Foundational understanding of ASIC design and test methodologies.
Hands-on experience running synthesis and timing flows.
Exposure to DFT concepts used in production silicon.
Mentorship and guidance from experienced engineers.
Practical experience working in a collaborative hardware development environment.