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Job Summary Working in the Advanced Power Systems group within the Power and Energy Business Line, the candidate will be part of a highly experienced team developing Power Management ICs (PMICs) for automotive and industrial applications. The successful candidate will lead the architecture, design,

Description: APAC Central Competence Team works with external foundries to ensure stable chip supply for business lines across NXP. The primary responsibility of this role is to locally drive the lead products ramp up under new technology introduction (NTI), and within foundry process transfers and

APAC Central Competence Team works with external foundries to ensure stable chip supply for business lines across NXP. The primary responsibility of this role is to locally drive the lead products ramp up under new technology introduction (NTI). The key areas of responsibility of the jobholder are:

Role Summary: Accountable for disaster recovery governance, business continuity alignment, the Minimum Viable Company program, cold start capability, crisis readiness, and the enterprise recovery exercise calendar. Coordinate Minimum Viable Company activity across CIO towers and sites on behalf of t

Generic Job Description (not Job Level specific): The Digital Design Engineer / Architect is responsible for defining and realizing Digital functions on IPs, Subsystem or IC level based on required specifications. The individual is responsible for design, verification and evaluation of those. The in

Key Responsibilities Technology Strategy & Roadmap Leadership Define and drive NXP’s long-term strategy for high-speed interfaces, clocking architectures, PLL technologies, and associated analog foundation IP. Analyze current and future requirements across all NXP Business Lines and Product Lines. D

Contexte Nous recherchons un(e) stagiaire motivé(e) et rigoureux(se) pour rejoindre notre équipe Analog Safety Development dans le cadre d’un stage de 6 mois axé sur la Sûreté de Fonctionnement (Functional Safety). Ce stage offre une opportunité unique d’acquérir une expérience pratique dans les ana

Generic Job Description (not Job Level specific): The SW Test / Validation Engineer / Architect debugs software products through the use of systematic tests to develop, apply, and maintain quality standards for company products. Develops, modifies, and executes software test plans, automated scripts

À propos de l’équipe Au sein de la Business Line Automotive Embedded Systems de NXP, nous développons des circuits intégrés destinés à la voiture connectée. Nos activités couvrent les réseaux embarqués, l’éclairage automobile, les systèmes audio, la gestion de l’alimentation ainsi que les radars. L’

For decades we at NXP have been developing innovative microchips as a world market leader that can be found almost everywhere – and make life possible as we know it today. Whether it's in credit cards, in smartphones or cars – we make sure that your life is easier, better and safer. Get to know us a

Contexte L’équipe « NFC Software», basée à Caen, a pour responsabilité de fournir les logiciels (firmware et middleware) nécessaires au fonctionnement des composants NFC conçus par NXP.Ces composants, qui équipent une majorité des téléphones mobiles et objets connectés et leur permettent de communiq

Contexte Description de votre division NXP développe des technologies mixtes hautes performances pour l’automobile, contribuant à rendre les véhicules plus propres, plus sûrs et plus connectés. Au sein de l’organisation centrale CTO, les équipes d’ingénierie conçoivent des solutions analogiques, mix

Monitor process operations to assure conformance to quality standards and engineering specifications Help troubleshoot complex process, quality & yield problems. Document new & revised specifications Provide innovative, real time, quick response, and solutions to operational issues to help maintain

The candidate(s) selected will be responsible for performing scheduled and unscheduled maintenance in Chandler Fab Photo equipment area. The technician position is responsible for effectively executing tasks that are required to maintain primarily the toolsets within the following tool groups: Photo

The candidate(s) selected will be responsible for performing scheduled and unscheduled maintenance in Chandler Fab Photo equipment area. The technician position is responsible for effectively executing tasks that are required to maintain primarily the toolsets within the following tool groups: Photo

We are seeking a diligent Material Handler to operate and maintain our Automated Storage and Retrieval Systems (ASRS). This role is crucial for ensuring the efficient flow of materials within our manufacturing and warehousing operations.Job Responsibilities:* Operates, monitors, and troubleshoots Au

Job SummaryResponsible for the safe and efficient movement, storage, and retrieval of materials within our automated storage and retrieval system (ASRS) environment, ensuring accurate inventory management and timely delivery to production lines.Job Responsibilities* Operate and monitor ASRS equipmen

Role Summary Lead an SoC verification team developing advanced MPU and MCU products. Own SoC-level verification strategy, planning, execution, coverage closure and sign-off, while building a strong team and collaborating across architecture, design, software, emulation, validation, quality, safety a

Generic Job Description (not Job Level specific): The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP, Subsystem or IC design. The individual is responsible from RTL synthesis to GDS implementation and optimization of design including floorplanning, ro

設備維修，依據產線異常狀況，立即進行設備故障排除與修復依照預防性保養計劃進行定期維護，降低設備故障率異常回報與維修紀錄，對重大異常即時回報工程師或主管，並協助後續處理嚴格遵守廠區安全規範，確保維護作業安全無虞 #LI-DNI