Junior FPGA Engineer

Singaporeentry

OtherFpga Engineer

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Quick Summary

Overview

DRW is a diversified trading firm with over 3 decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world.

Technical Tools

OtherFpga Engineer

Responsibilities

~1 min read

→Contribute to the implementation of FPGA applications (RTL development, simulation and verification) under the guidance of senior engineers
→Run parts of the FPGA tool flow (synthesis, place & route, static timing analysis) and learn to interpret the results
→Help plan and execute system- and block-level testcases and laboratory bring-up of new hardware
→Participate in debugging and characterization of boards and FPGA designs; support production incidents with senior team members
→Work with software, network and trading teams to integrate FPGA components into broader systems
→Research new tools, techniques and FPGA technologies and propose ideas for incremental improvements
→Produce clear documentation and test reports

Bachelor’s or Master’s or PhD degree in Electrical Engineering, Computer Engineering, Computer Science or a related field (recent/upcoming graduates welcome)
0–2 years of professional experience, or equivalent experience from internships, research or university projects
Practical experience writing RTL (Verilog or SystemVerilog) — course projects or internship work is fine
Familiarity with FPGA development flows and tools (Xilinx or Intel/Altera) or strong desire to learn them quickly
Basic experience with simulation and verification tools (e.g., ModelSim, Questa, or equivalent) or demonstrable coursework/projects
Comfortable using Linux and basic scripting (Python, Bash) for test automation and tooling
Good problem solving, debugging and communication skills — ability to work collaboratively in cross-functional teams
Eagerness to learn, take feedback, and grow technical ownership over time

Nice to Have

~1 min read

Exposure to high-speed interfaces (Ethernet/PCIe/DDR memory) or SoC subsystems
Experience with C/C++ for embedded systems or software-hardware integration
Knowledge of networking fundamentals (TCP/IP) or timing/latency optimization concepts
Familiarity with version control (Git) and CI workflows