Quick Summary
Overview
DRW is a diversified trading firm with over 3 decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world.
Key Responsibilities
Architect and implement new FPGA applications (synthesis, place & route, static timing analysis, documentation) from the ground up Research and evaluate a variety of cutting-edge FPGA hardware and technologies Propose creative solutions to overcome…
Technical Tools
python
Responsibilities
~1 min read- →Architect and implement new FPGA applications (synthesis, place & route, static timing analysis, documentation) from the ground up
- →Research and evaluate a variety of cutting-edge FPGA hardware and technologies
- →Propose creative solutions to overcome FPGA/hardware limitations
- →Liaise directly with software and other design teams
- →Conduct lab debugging and characterization of new hardware
Requirements
~1 min read- Bachelor's degree or higher, Computer/Electrical Engineering graduated with honors from a leading university, with 3+ years of experience within the field; (Master's degree or higher also counts for experience)
- Solid Hardware Engineering experience, especially with FPGA
- Highly autonomous with a can-do attitude able to lead an FPGA based project from system requirements to production
- Strong capacity to quickly evaluate FPGA based project feasibility based on hardware limitation
- Strong skills in RTL logic design and verification; 2+ years of experience writing Verilog or SystemVerilog
- Strong knowledge of FPGAs fabric
- Experience in FPGA design flow including synthesis, place & route, static timing analysis is required
- Knowledge of Ethernet and Gigabit high speed serial interfaces
- Strong working knowledge of either XILINX or ALTERA FPGA design flow
- Experience with Python verification framework is a plus
- Excellent research and data gathering skills
#LI-BL1
Location & Eligibility
Where is the job
Tel Aviv, Israel
On-site at the office
Who can apply
IL
Listed under
Worldwide
Listing Details
- Posted
- February 27, 2026
- First seen
- March 26, 2026
- Last seen
- May 30, 2026
Posting Health
- Days active
- 65
- Repost count
- 0
- Trust Level
- 23%
- Scored at
- May 30, 2026
Signal breakdown
freshnesssource trustcontent trustemployer trust
External application · ~5 min on Drweng's site
Please let Drweng know you found this job on Jobera.
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Senior FPGA Engineer