Platform Intern - ME

Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Our mechanical/thermal engineering interns will work within the mechanical and thermal engineering organization, with a strong focus on NPI prototyping, manufacturing fixture development, liquid cooling technologies and rack-level system development

Our Platform Team is building the full-stack system that supports Etched Silicon from PCB to Rack. . We are seeking interns to work across all aspects of mechanical and electrical engineering to design the future of high power ASIC systems.

• Progress towards a Bachelor’s or Master’s in Mechanical Engineering, Computer Engineering, or related field

• Experience building real mechanical systems, boards, or other hands-on projects.

• Knowledge of board design cycle, high-speed interconnects, power delivery, and system integration.

We encourage you to apply even if you do not believe you meet every qualification.

• 12-week paid internship (June - August 2026)

• Generous housing support for those relocating

• Daily lunch and dinner in our office

• Based at our office in San Jose, CA

• Direct mentorship from industry leaders and world-class engineers

• Opportunity to work on one of the most important problems of our time

Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.