4d ago
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• AI/ML CAD Engineer, RTL & Design Verification

2 Locationsmid
OtherDesign Verification Engineer
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Quick Summary

Key Responsibilities

Troubleshoot issues across RTL, EDA Frontend tools (VC_SPYGLASS(Lint, CDC and RDC), VCS, VMS) and automation infrastructure, and design environments. Develop, deploy,

Requirements Summary

You must possess the below minimum qualifications to be initially considered for this position.

Technical Tools
OtherDesign Verification Engineer

Join a team helping shape the future of high-performance CPU design. As an AI/ML CAD Engineer supporting RTL and Design Verification, you will develop and enhance automation, tools, and methodologies that help engineering teams design and validate advanced microprocessors.


You will combine software engineering, CAD/EDA, RTL and verification knowledge, and AI-assisted development to improve front-end design workflows spanning RTL development, simulation, verification, emulation, static sign-off, and CI/CD.


This is an opportunity to apply strong programming and problem-solving skills to complex CPU development challenges while helping introduce AI-enabled capabilities that improve engineering productivity and efficiency.


Responsibilities

~1 min read
  • →Troubleshoot issues across RTL, EDA Frontend tools (VC_SPYGLASS(Lint, CDC and RDC), VCS, VMS) and automation infrastructure, and design environments.
  • →Develop, deploy, and maintain AI-assisted CAD/EDA automation, tools, and workflows supporting RTL design and verification.
  • →Build scripts and software solutions that improve RTL build, simulation, verification, emulation, regression, and static sign-off workflows.
  • →Apply AI/ML and AI-assisted development technologies to improve engineering automation, debugging, and productivity.
  • →Develop and enhance CI/CD and regression automation for hardware development workflows.
  • →Analyze workflow and infrastructure data to identify opportunities for improved performance, reliability, and engineering efficiency.
  • →Partner with engineering and cloud infrastructure teams to improve compute utilization and scalability.
  • →Collaborate with RTL design, verification, CAD, infrastructure teams, and EDA vendors to resolve technical issues and improve methodologies.
  • Technical curiosity: Enjoys learning new technologies and finding better ways to solve engineering challenges.
  • Problem solving: Uses structured analysis and sound judgment to troubleshoot complex technical issues.
  • Collaboration: Works effectively across design, verification, software, infrastructure, and vendor teams.
  • Communication: Clearly communicates technical issues, recommendations, and solutions to different audiences.
  • Ownership: Takes responsibility for deliverables and follows issues through resolution.
  • Adaptability: Comfortable learning and working across evolving AI, software, and semiconductor design technologies.

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life. 

Requirements

~1 min read

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.  Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.


  • Troubleshoot EDA tools and design environments
  • Experience with major EDA tools (VC_SpyGlass, VCS, Questasim, coverage/low-power tools).
  • Experience with CAD/EDA automation (simulation/emulation flows, verification integration, CI/CD).
  • Experience with AI Development environments such as GitHub/Copilot, Claude Code, Cursor.
  • Experience supporting RTL build and simulation/verification workflows.
  • Experience working with EDA vendors (issue triage, features, debugging).
  • Multi-domain debugging (RTL, testbench, tools, scripts, infrastructure).
  • Cloud compute experience (scaling sim farms, resource optimization).
  • DevOps for hardware (regressions, CI/CD, monitoring/alerting).
  • Verilog/SystemVerilog.

          

Experienced Hire

Shift 1 (United States of America)

US, Texas, Austin

US, Oregon, Hillsboro

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
N/A

What We Offer

~1 min read

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Location & Eligibility

Where is the job
—
Location terms not specified
Who can apply
Same as job location

Listing Details

Posted
September 28, 2026
First seen
September 29, 2026
Last seen
October 1, 2026

Posting Health

Days active
1
Repost count
0
Trust Level
55%
Scored at
October 1, 2026

Signal breakdown

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• AI/ML CAD Engineer, RTL & Design Verification