Silicon Packaging Design Architect

• →Translate product requirements into detailed package architecture specifications.
• →Drive technology tradeoff decisions to ensure silicon packages conform to electrical, mechanical, thermal, and reliability standards.
• →Collaborate with silicon, hardware, and package teams to deliver high-quality package solutions and overcome roadblocks.
• →Oversee the end-to-end package development process, including design, procedures, and continuous improvements to quality standards.
• →Troubleshoot packaging designs and resolve issues related to materials and processes, providing innovative and cost-effective solutions.
• →Implement co-design strategies between silicon and board design teams to optimize product performance and cost.
• →Collaborate with EDA partners to advance package design tools and optimize design methods.

• Strong analytical, communication, and organizational skills.
• Proven ability to manage multiple priorities and deadlines in a dynamic environment.

The Minimum qualifications are required to be initially considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• Option 1: Bachelor's degree in electrical engineering, mechanical engineering, chemical engineering, materials science or in a STEM related role with 6+ years of experience.
• Option 2: Master's degree in electrical engineering, mechanical engineering, chemical engineering, materials science or in a STEM related role with 4+ years of experience.
• Option 3: Ph.D. in electrical engineering, mechanical engineering, chemical engineering, materials science or in a STEM related role with 2+ years of experience.
• 2+ years of hands-on experience in semiconductor fabrication, chip assembly, or packaging.
• Experience in electromagnetic simulation tools such as Mentor, Cadence tools, SPICE, Ansys tools, or similar platforms.
• Experience with Cadence Allegro platform tools (e.g. PCB Editor, Advanced Package Designer, APD/SiP, Concept HDL, Sigrity) and/or Mentor Xpedition platform tools (PCB Layout/XPD, Designer, Hyperlynx).
• In-depth knowledge of assembly processes, test methodologies, and characterization techniques.

• 10+ years of experience with profound knowledge in Package, PCB design, or IC digital design.
• Experience in troubleshooting and optimizing packaging designs for cost and quality.
• Strong analytical and problem-solving skills, including the ability to identify, isolate, and resolve complex design issues.
• Experience in semiconductor fabrication and packaging processes.
• Proven ability to collaborate with multidisciplinary teams across various levels of abstraction.
• Familiarity with technology trade-off decisions to ensure high-quality package outputs.
  

We look forward to welcoming innovative thinkers who are passionate about shaping the future of technology. Apply today to make an impact and join Intel's journey toward groundbreaking advancements.

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