ASIC & FPGA Design Engineer

Join a technically advanced engineering environment where you will design and develop high-performance digital and mixed-signal integrated circuits and FPGA solutions.
As a Senior ASIC & FPGA Design Engineer, you will contribute to the full hardware development lifecycle, from architecture and RTL design to verification, implementation, and system integration.
You will leverage your expertise in VHDL, Verilog, and SystemVerilog to build reliable, efficient designs that meet demanding performance and timing requirements.
Working closely with architecture, systems, firmware, and product engineering teams, you will help solve complex implementation challenges and deliver robust hardware solutions.
Your responsibilities will include verification strategy, timing analysis, design optimization, and support for laboratory integration and troubleshooting.
This fully remote contract opportunity offers the chance to apply advanced digital design expertise to technically challenging projects alongside multidisciplinary engineering teams.
The initial contract runs from October 12, 2026, through June 30, 2027, with potential full-time conversion subject to business needs and relocation requirements.

• At least 7 years of experience in ASIC design and implementation.

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.

• Practical experience with ASIC and FPGA design and development.

• Proficiency in at least one major hardware description language: VHDL, Verilog, or SystemVerilog.

• Experience working in a Linux-based development environment.

• Hands-on experience developing verification methodologies, test benches, and test plans.

• Understanding of digital design principles, implementation constraints, and functional verification processes.

• Experience analyzing design performance and resolving implementation issues.

• Strong problem-solving and analytical skills, with the ability to troubleshoot complex hardware design challenges.

• Effective communication and collaboration skills to work with cross-functional engineering teams.

• Ability to work independently, manage technical priorities, and deliver high-quality results in a remote engineering environment.

• Master's or PhD degree in Electrical Engineering, Computer Engineering, or a related technical field.

• Experience across the full ASIC and FPGA lifecycle, including architecture, design, simulation, verification, validation, integration, and testing.

• Familiarity with Software-Defined Radio (SDR) architectures, analog-to-digital and digital-to-analog converters (ADC/DAC), and digital signal processors (DSPs).

• Knowledge of digital signal processing and communications systems, including spread spectrum, forward error correction, and modulation techniques such as QPSK, QAM, PCM/FM, and PAM.

• Strong object-oriented programming and scripting skills using Python, Tcl, Perl, or similar languages.

• Experience with physical design flows and industry-standard electronic design automation (EDA) tools.

• Knowledge of RTL-to-GDSII implementation and physical design signoff processes.

• Familiarity with deep-submicron FinFET and CMOS technologies.

• Experience with design-for-test (DFT) methodologies, including scan, memory built-in self-test (MBIST), and logic built-in self-test (LBIST).

• Previous experience mentoring junior engineers or providing technical leadership.

• Strong stakeholder management skills and the ability to communicate complex technical concepts clearly.