FPGA Digital Engineer - 2

Northrop Grumman Space Systems is looking for an FPGA Digital Engineer to support the Electro-Optics (EO) Group within the Launch Vehicles business unit in Chandler, Arizona.

As a FPGA Design Engineer, you will collaborate with experienced FPGA engineers and cross-disciplinary teams (hardware, algorithms, software) to support the design, verification, and integration of FPGAs for advanced systems. This early-career role is focused on learning, developing foundational skills, and contributing to project deliverables under guidance.

• →Work under supervision to assist senior FPGA engineers and multidisciplinary teams in resolving design and integration challenges.
• →Participate in the development and execution of test benches to verify FPGA designs for functional and timing requirements.
• →Support generating, verifying & integrating IO and image processing HDL modules. including functions definitions, HDL coding, module level sim and integration with overall device architecture
• →Prepare, organize, and maintain design documentation, including schematics, simulation results, and verification reports with oversight.
• →Support configuration management of FPGA bitstream builds as directed.
• →Contribute to ensuring compliance with internal design standards throughout the development lifecycle.
• →Continue developing technical knowledge of evolving FPGA technologies, tools, and industry methodologies.

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related discipline from an accredited university and 2 years of relevant experience; or a Master’s degree.

• Ability to obtain a U.S. Government Department of Defense (DoD) Secret security clearance at the time of application.
• Internship, co-op, or academic project experience with FPGAs, SoCs, or digital hardware (VHDL preferred, or Verilog).
• Exposure to AMD Xilinx FPGAs and SoCs (academic or project experience acceptable).
• Familiarity with managing design constraints (timing, power, I/O) and using development tools such as Vivado IDE.
• Exposure to the development, verification, or debugging of digital interfaces/buses (such as Ethernet, PCIe, AXI4, UART, SDLC) via coursework or projects.
• Familiarity with simulation tools (Questa/ModelSim) or basic hardware debugging tools (logic analyzers, oscilloscopes).
• Experience developing or running verification plans using simulation, analysis, or hardware bench testing from coursework or internships.

• Master’s degree in Electrical Engineering, Computer Engineering, or related discipline.
• Active U.S. Government DoD Secret security clearance at the time of application.
• Direct experience with missile systems, seeker systems, or other high reliability, environmentally challenging electro optical applications (academic or internship).
• Familiarity with AMD Xilinx Versal FPGAs/SoCs.
• Exposure to Vitis Unified IDE and memory interface standards (DDR3/DDR4/DDR5).
• Coursework or project experience with embedded C/C++ programming.
• Understanding of OSVVM or UVM verification methodologies.
• Interested in high-speed PCB design and signal integrity.