Manager, Digital Design - Mixed-Signal High-Speed I/O SerDes

United States·Santa Clara

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Quick Summary

Key Responsibilities

Lead and mentor a team of engineers in developing mixed-signal chips Supervise the planning and specification of algorithms, evaluating PPA (Power, Performance,

Requirements Summary

M.S. or Ph.D. in Electrical Engineering or equivalent experience and over 8 years of overall experience in mixed signal Proven experience in mixed-signal chip design,

Technical Tools

Other

Are you looking for a Digital Design Manager role? As a Senior Digital Design Manager in our Mixed-Signal High-Speed I/O SerDes group, you'll lead a team working on NVIDIA's latest groundbreaking technology that enables and accelerates gaming, artificial intelligence, deep learning, and autonomous driving. Your team's designs will be consumed by standard as well as industry-leading proprietary high-speed protocols, serving as key IPs in sophisticated SoCs. You'll collaborate closely with analog designers, system architects, and other engineering teams to drive innovation and deliver high-performance solutions.

Responsibilities

~1 min read

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Lead and mentor a team of engineers in developing mixed-signal chips
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Supervise the planning and specification of algorithms, evaluating PPA (Power, Performance, Area) trade-offs
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Guide the design of digital circuits such as filters and analog calibration circuits
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Ensure verification of digital designs using direct and random testing methodologies
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Lead front-end design flows (Lint/CDC/Synthesis/DFT/LEC/STA) and coordinate with back-end teams for successful chip tape-outs
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Drive silicon bring-up efforts and performance optimization
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Collaborate with multi-functional teams to align technology roadmaps with business objectives
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Establish and maintain standard methodologies for mixed-signal design and verification

Requirements

~2 min read

M.S. or Ph.D. in Electrical Engineering or equivalent experience and over 8 years of overall experience in mixed signal
Proven experience in mixed-signal chip design, with 3+ years in a leadership role
Expertise in Verilog or SystemVerilog, logic design, and circuit modeling in RTL for mixed-signal blocks
Strong background in custom digital circuit design and adaptation algorithms (FFE, DFE, CTLE, CDR, offset cancellation), understanding of high-speed SerDes I/O digital design, with knowledge of protocols like Ethernet and PCIe
Experience with industry-standard verification methodologies, such as UVM
Proficiency with static timing and formal verification tools
Excellent communication and leadership skills, with the ability to drive technical strategy

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice and join us today!

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000 USD - 310,500 USD.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until January 13, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.