25d ago

SoC Physical Designer

Tianjin (teda)mid
Other
1 views0 saves0 applied

Quick Summary

Key Responsibilities

Support SoC and subsystem physical design implementation from netlist to GDSII. Participate in floorplanning, power planning, placement, clock tree synthesis (CTS), routing,

Requirements Summary

Microelectronics Integrated Circuit Design Electronic Engineering Computer Engineering Automation Related disciplines Basic knowledge of VLSI design flow and semiconductor fundamentals.

Technical Tools
Other

As a Graduate Physical Design Engineer, you will participate in the development of advanced semiconductor products and be involved in the complete physical implementation flow.

Your responsibilities include:

  • Support SoC and subsystem physical design implementation from netlist to GDSII.
  • Participate in floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and chip finishing activities.
  • Perform timing, power, signal integrity, and physical verification analysis.
  • Debug design implementation issues and drive convergence toward project PPAC (Performance, Power, Area, Cost) targets.
  • Work with cross-functional teams including RTL Design, DFT, Verification, IP, Package, and Technology teams.
  • Develop and improve EDA automation scripts using Python, Tcl, or other scripting languages.
  • Explore AI-assisted design methodologies to improve engineering productivity and design quality.
  • Support silicon bring-up, design reviews, and tapeout activities.
  • Contribute to continuous improvement of backend methodologies, flows, and best practices.

Requirements

~1 min read
  • Master's degree (graduating in 2027) in:
    • Microelectronics
    • Integrated Circuit Design
    • Electronic Engineering
    • Computer Engineering
    • Automation
    • Related disciplines
  • Basic knowledge of VLSI design flow and semiconductor fundamentals.
  • Familiarity with Linux/Unix environments.
  • Programming experience in Python, Tcl, Perl, Shell, or C/C++.
  • Strong analytical and problem-solving skills.
  • Good communication and teamwork skills.
  • Fluent written and spoken English.

Preferred

  • Coursework or project experience in:
    • ASIC/SoC Design
    • Physical Design
    • Timing Analysis
    • DFT
    • Digital IC Design
  • Hands-on experience with EDA tools such as:
    • Synopsys Fusion Compiler
    • ICC2
    • PrimeTime
    • Cadence Innovus
    • Tempus
    • Calibre
  • Experience with machine learning or AI applications in semiconductor design.
  • Publications, competitions, or research projects related to EDA or IC design are a plus.


More information about NXP in Greater China...

#LI-6650

Location & Eligibility

Where is the job
Tianjin (teda)
On-site at the office
Who can apply
Same as job location

About this job

Posted
25 days ago
Employer
has 972 open jobs on Jobera in 21 countries.

Listing Details

Posted
October 12, 2026
First seen
October 18, 2026
Last seen
November 7, 2026

Posting Health

Days active
19
Repost count
0
Trust Level
14%
Scored at
November 7, 2026

Signal breakdown

freshnesssource trustcontent trustemployer trust
Newsletter

Stay ahead of the market

Get the latest job openings, salary trends, and hiring insights delivered to your inbox every week.

A
B
C
D
Join 12,000+ marketers

No spam. Unsubscribe at any time.

SoC Physical Designer