Intern, RISC-V CPU

United States·Boston,Austin,Santa Clara+1 moreentry

OtherIntern

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Quick Summary

Key Responsibilities

This posting spans multiple roles within the RISC-V team. One application, one recruiter screen - then we match you to the specific team and location that fits best.

Requirements Summary

HDLs (such as SystemVerilog), computer architecture, or RTL design and debugging concepts. Programming or scripting skills in Assembly, C/C++, Python, or Perl. Design verification, formal analysis,

Technical Tools

OtherIntern

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Responsibilities

~1 min read

→Currently pursuing a BS, MS, or PhD in EE, ECE, CS, CE or related field
→Strong academic performance with hands-on related coursework, project or work experience.
→Interest in RISC-V, CPU architecture, AI/ML hardware, verification, performance, or low-level software.
→Strong debugging, analytical, communication, and collaboration skills.
→Ability to learn new tools and work in an on-site engineering environment
→Interest or exposure with AI tools to accelerate development and workflows.

→Hands-on experience with modern, out-of-order RISC-V CPU microarchitecture design and implementation.
→Advanced design verification methodologies, including formal analysis, simulation, and testbench development.
→Low-level platform software, firmware, and system-level initialization for high-performance processors.
→Performance analysis, bottleneck identification, and optimization techniques on custom silicon environments.

Requirements

~1 min read

Strong foundational exposure to one or more of the following key areas:
HDLs (such as SystemVerilog), computer architecture, or RTL design and debugging concepts.
Programming or scripting skills in Assembly, C/C++, Python, or Perl.
Design verification, formal analysis, simulation, testbenches, or coverage analysis.
CPU microarchitecture, out-of-order pipelines, memory systems, or performance modeling.
Familiarity with Linux, Git, CI/CD pipelines, firmware, or low-level system software.

This internship opportunity is available throughout our 3 terms with the following corresponding recruitment cycles:

Winter Term: Jan–Apr work term, Sept–Dec recruit.
Summer Term: May–Aug work term, Oct–Apr recruit.
Fall Term: Sept–Dec work term, Jan–Aug recruit.

Please note these timelines are for reference only. Actual timelines may vary.

Compensation for all interns at Tenstorrent ranges from $50/hr - $70/hr including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.