Hardware Verification Engineer

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  Lead verification of Match-Action Pipeline and UART/IPs with staged customer deliveries.

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  Drive bring-up, test planning, and execution for UART, I3C, I2C, and Ethernet peripherals.

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  Develop reusable APB protocol verification environments.

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  Integrate commercial Ethernet VIPs at block and chip levels (800G/400G/100G).

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  Create and execute UVM sequences for PCIe/CXL traffic generation and validation.

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  Configure and verify I3C chiplet and HUB chiplet communications with processor cores.

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  Validate NIC400 infrastructure and system address mapping for SoC flows.

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  Perform Control/Status Register (CSR) verification for Ethernet chiplets.

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  Drive coverage closure (line, toggle, FSM) and establish regression setups.

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  Automate Register Abstraction Layer (RAL) flows for efficient verification.

• Strong command of UVM methodology and SystemVerilog.

• Experience with industry-standard VIPs and simulators.

• Deep understanding of AMBA protocols (APB, AXI), Ethernet, PCIe, I3C.

• Familiarity with chiplet-based architecture and IP integration.

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