ASIC Engineer Intern

Join our ASIC team as an intern and gain hands-on experience in cutting-edge semiconductor development. Interns will have the opportunity to focus on one of three specialized areas—ASIC Design, ASIC Verification, or ASIC Tools & Methodologies—based on their interests and skills. You are not expected to perform all three activities; instead, you will work closely with senior engineers in your chosen domain.

• →Collaborate with team members to troubleshoot technical issues and propose solutions.
• →Participate in team meetings, learn project methodologies, and share progress during periodic reviews.
• →Actively engage in learning new technologies and best practices relevant to your focus area.
• →Complete assigned tasks efficiently and incorporate feedback.

• Participate in ASIC architecture investigation tasks, including evaluating design trade-offs and performance analysis.
• Create detailed functional and micro-architectural specifications
• Assist in RTL design using SystemVerilog, ensuring functionality, performance, and power goals.
• Support synthesis, linting, and design reviews.

• Develop and maintain testbenches using SystemVerilog and UVM.
• Write test plans, assertions, create functional coverage models, and debug simulation failures.
• Contribute to regression setup and results analysis.
• Participate in emulation activities for pre-silicon validation.

• Contribute to automation to accelerate ASIC development processes, flow improvements, and EDA tool evaluations.
• Develop utilities to enhance productivity and improve design/verification processes.
• Work with EDA tools for physical design, including synthesis, place-and-route, timing analysis, and sign-off flows.
• Support Design-for-Test (DFT) methodology development and integration.

• Currently pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field.
• Coursework in Digital Logic Design, Computer Architecture, or VLSI Design is highly desirable.
• Familiarity with ASIC concepts through academic projects or internships is a plus.

• Programming & Scripting: Exposure to SystemVerilog, UVM, and basic knowledge of Python, C++, or similar languages.
• Understanding of ASIC design flow, verification methodologies, and EDA tools for physical design.
• Strong analytical and problem-solving skills.
• Excellent communication and interpersonal skills.
• Ability to manage time and meet deadlines.
• Passion for high-tech and continuous learning.
• Knowledge of networking protocols, machine learning, or advanced computer architecture is a plus.

HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you believe you require accommodation during any stage of the application or interview process, please submit your request by completing our secure form linked here.

Note: This option is reserved for applicants needing assistance/reasonable accommodation related to a disability.

We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing.

We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.

We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good.

Information about employee benefits offered in the US can be found at https://myhperewards.com/main/new-hire-enrollment.html

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