Director, Advanced Power Silicon & Packaging Technology

The Director of Advanced Power Silicon & Packaging Technology leads the strategy, architecture, development, and deployment of next-generation power delivery technologies spanning silicon, package, and system integration. This role is responsible for driving innovation in power semiconductors, advanced packaging, and silicon-package-system co-optimization for AI, datacenter, networking, and high-performance computing platforms.

The director partners across silicon design, packaging, architecture, manufacturing, and product organizations to deliver breakthrough improvements in power efficiency, power density, performance, reliability, and total cost of ownership.

• Define and execute the long-term roadmap for:
  • Advanced power silicon technologies
  • Advanced packaging and heterogeneous integration
  • Chip-package-system co-design
  • Vertical power delivery solutions
• Identify disruptive technologies and assess strategic investment opportunities.
• Drive technology differentiation and competitive advantage.

• Drive adoption of advanced semiconductor technologies including:
  • GaN power devices
  • SiC technologies
  • Advanced CMOS and BCD power processes
• Optimize power efficiency, die area, and reliability.

• Establish packaging technology roadmaps for:
  • 2.5D and 3D packaging
  • Chiplet architectures
  • Silicon interposers
  • Fan-out packaging
  • Embedded power delivery
  • Co-packaged solutions
• Lead package electrical, thermal, and mechanical optimization.
• Drive package innovations enabling higher power density and lower power delivery losses.

• Lead cross-functional initiatives to optimize:
  • Power integrity (PI)
  • Signal integrity (SI)
  • Thermal performance
  • Electromigration reliability
  • Power delivery network (PDN)
• Develop end-to-end power architectures from regulator to transistor.

• Lead advanced technology incubation and proof-of-concept programs.
• Build strategic partnerships with:
  • Semiconductor foundries
  • OSAT partners
  • EDA vendors
  • Universities and research institutions
• Create and manage intellectual property portfolios.
• Drive patent generation and technical publications.

• Establish a culture of technical rigor, innovation, accountability, and execution excellence.
• Mentor senior technical leaders and develop organizational capability.

• Expertise in:
  • Vertical power delivery
  • Backside power distribution networks
  • Embedded voltage regulation
• Strong patent portfolio and industry recognition.
• Participation in IEEE, OCP, JEDEC, or semiconductor standards organizations.

More information about NXP in Greater China...

• BS in Electrical Engineering, Physics, Materials Science, or related discipline.
• MS or PhD preferred.

• 15+ years of semiconductor and power technology experience.
• 6+ years leading technology, architecture, or engineering organizations.
• Proven success delivering innovative silicon and packaging technologies from concept through production.

• Power semiconductor devices
• Power integrity analysis

• Chiplet integration
• 2.5D/3D packaging
• Fan-out technologies
• Silicon interposers
• Package reliability and qualification

• Power delivery networks
• Thermal management
• Manufacturing and supply chain considerations