Senior Research Fellow (IC Design and EDA)

School of Electrical and Electronic Engineering is one of the founding Schools of the Nanyang Technological University. Built on a culture of excellence, the School is renowned for its high academic standards and research.  With over 3,000 undergraduates students and 2,000 graduate students it is one of the largest EEE schools in the world and ranks 4th in the field of Electrical & Electronic Engineering in the 2025 QS World University Rankings by Subjects.

Today, the School has become one of the world’s largest engineering schools that nurtures competent engineers and researchers. Each year, the School graduates over a thousand students who are ready to take on great ambitions and challenges.

For more details, please view: https://www.ntu.edu.sg/eee

We are looking for a Senior Research Fellow to provide technical leadership in open-source processor and accelerator architectures. The role focuses on advancing research in integrated circuit (IC) design and electronic design automation (EDA), with particular emphasis on RISC-V based processors, AI accelerators, and open-source hardware toolchains. The Senior Research Fellow contributes to the University’s mission by conducting high-impact research, developing innovative hardware architectures and design methodologies, and disseminating research outcomes through publications, collaborations, and open-source contributions.

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  Conduct independent and collaborative research on open-source processor architectures and hardware accelerators, including RISC-V based designs.

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  Define research directions and contribute to the strategic planning of IC design and EDA research initiatives.

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  Design, implement, and evaluate digital ICs using Verilog/SystemVerilog and related hardware description languages.

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  Develop and optimize EDA workflows for processor and accelerator design, verification, and physical implementation using open-source tools.

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  Explore architecture-algorithm co-design for machine learning and AI acceleration.

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  Perform performance, power, and area (PPA) analysis of processor and accelerator designs.

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  Publish research findings in top-tier conferences and journals, and contribute to open-source hardware and EDA communities.

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  Supervise and mentor PhD students and junior Research Fellows.

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  Collaborate with academic, industry, and international partners, and contribute to grant proposals, project management, and reporting.

• A completed PhD in Electrical Engineering, Computer Engineering, Computer Science, or a closely related discipline.

• At least 5 years of research experience in IC design, processor architecture, or related fields.

• Strong research expertise in RISC-V architecture, processor microarchitecture, and AI accelerators.

• Experience with ASIC design methodologies and open-source IC design and EDA tools.

• Proven experience in digital hardware design using Verilog/SystemVerilog or equivalent HDLs.

• In-depth knowledge of machine learning algorithms and hardware acceleration techniques.

• Strong publication record in reputable international journals and conferences.

• Demonstrated ability to lead research projects, supervise researchers, and mentor junior staff.

• Strong analytical and problem-solving skills, with the ability to work independently and collaboratively.

• Excellent analytical, organizational, and time management skills.

• Self-driven, adaptable, and capable of working in a fast-paced research environment.

We regret to inform that only shortlisted candidates will be notified.