Principal Digital Verification Engineer

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  Lead digital verification activities and drive successful project execution from planning through signoff.

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  Define verification plans, methodologies, environments, regressions, coverage goals, and signoff criteria.

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  Review product requirements, architecture specifications, microarchitecture, interfaces, and implementation plans.

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  Develop and maintain advanced verification environments using SystemVerilog, UVM, VIPs, scoreboards, monitors, checkers, and assertions.

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  Create directed and constrained-random test scenarios to validate functionality, performance, robustness, and corner-case behavior.

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  Define, implement, and analyze functional, code, and assertion coverage; drive coverage closure and signoff.

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  Apply SystemVerilog Assertions (SVA), formal verification methodologies, and regression analysis to identify and resolve issues.

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  Verify PMIC digital control, telemetry, diagnostics, safety, power sequencing, fault management, communication interfaces, and embedded control functions.

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  Deliver verification collateral including test plans, environments, assertions, regressions, coverage reports, metrics, milestones, and requirements traceability.

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  Drive methodology improvements, automation, reuse, and productivity while mentoring junior engineers and collaborating across global teams.

• BSEE with 8+ years, MSEE with 5+ years, or PhD with 3+ years of semiconductor industry experience.

• Strong understanding of digital design fundamentals, FSMs, CDC, reset architecture, low-power design, and SoC integration.

• Expertise in Verilog, SystemVerilog, UVM/OVM, and class-based verification methodologies.

• Strong knowledge of constrained-random, coverage-driven verification, regression automation, and verification signoff.

• Hands-on experience developing testbenches, drivers, monitors, scoreboards, assertions, and reusable verification IP.

• Experience with SystemVerilog Assertions (SVA), formal verification techniques, and low-power verification methodologies such as UPF/CPF.

• Knowledge of industry-standard protocols including AMBA, I²C, SPI, UART, CAN, LIN, DDR, and PCIe.

• Proficiency in Python, Perl, and UNIX/Linux shell scripting for automation.

• Familiarity with FPGA, emulation, or prototyping platforms such as HAPS, Palladium, or Zebu is a plus.

• Understanding of PMIC architectures and power management concepts is highly desirable.

• Experience using AI/LLM-based technologies to improve engineering productivity is a plus.

• Strong analytical, debugging, problem-solving, communication, leadership, mentoring, and cross-functional collaboration skills.

NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.

For more information, please visit our website https://www.nxp.com

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NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.