Director AI/ML Driven ASIC Design and Implementation Automation

As a Director of AI/ML driven ASIC Design and Implementation Automation in our AI & Chip Engineering (ACE) organization, you will work in a dynamic environment to explore methodology, flows and tools to improve efficiency and quality of results (power, performance, area, and quality) for SoC and IP development teams across the organization. You'll be working and connecting with AI/ML and automation experts in the industry as well as academia to explore state-of-the-art AI/ML CAD techniques as a part of VLSI CAD SW, prescribe key methods and requirements for tools & features to leverage for ASIC design.

• Strong understanding of design, layout, constraints (SDC, Clocks, CDC, RDC), Static timing analysis, Low-power, and Power-aware flows (UPF)

• Prior experience in VLSI CAD methodology and tool development

• Good understanding of HDL: System Verilog, Verilog, VHDL, front-end design, physical design and layout implementation/generation flows and tools

• Understanding or prior experience with EDA tools for design, verification, DFT and implementation

• Experience with Design revision control (GIT, DesignSync) and Make

• Splunk, Jenkins, LSF and CI/CD process

• San Diego, CA

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.