~1h ago
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Principal Silicon Validation Engineer

IndiaIndia·Punelead
QA & TestingValidation Engineer
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Quick Summary

Key Responsibilities

Define validation plans for MCU/MPU subsystems (CPU, memory, peripherals, interconnects). Develop test cases and coverage metrics based on architecture and design specs. Identify corner cases,

Requirements Summary

Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering (or related). 12+ years of experience in semiconductor validation (analog), product engineering, or silicon debug.

Technical Tools
QA & TestingValidation Engineer

Requirements

~1 min read
  • Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering (or related).
  • 12+ years of experience in semiconductor validation (analog), product engineering, or silicon debug.
  • Strong hands-on background in:
    • MCU architectures
    • Embedded systems
    • Lab bring-up and silicon debug tools (JTAG, logic analyzers, scopes, etc.)
  • Proven ability to lead large, distributed engineering teams.
  • Excellent communication and executive presence.

Responsibilities

~1 min read
  • →Define validation plans for MCU/MPU subsystems (CPU, memory, peripherals, interconnects).
  • →Develop test cases and coverage metrics based on architecture and design specs.
  • →Identify corner cases, stress scenarios, and system-level use cases.
  • Perform post-silicon validation on silicon platforms, evaluation boards, and emulators.
  • Support pre-silicon validation/emulation efforts where required.
  • Debug issues across hardware–software boundary.
  • Develop validation test suites using C/C++, Python, or scripting languages.
  • Build automation frameworks for regression and validation flows.
  • Create scripts for data capture, logging, and analysis.
  • Perform low-level debugging using tools such as:
    • JTAG, SWD
    • Logic analyzers, oscilloscopes
    • Trace tools (ETM, ITM)
  • Root cause failures across:
    • CPU cores (ARM/RISC-V)
    • Memory subsystems (DDR, SRAM, Flash)
    • Peripherals (UART, SPI, I2C, GPIO, etc.)
  • Work with:
    • RTL design teams (for bug fixes and clarifications)
    • Verification teams (for coverage gap closure)
    • Firmware/software teams (for test enablement)
  • Review architecture and design specifications.


More information about NXP in India...

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Location & Eligibility

Where is the job
Pune, India
On-site at the office
Who can apply
IN

About this job

Who can apply
India
Posted
Today
Employer
has 675 open jobs on Jobera in 11 countries.

Listing Details

First seen
October 18, 2026
Last seen
October 18, 2026

Posting Health

Days active
0
Repost count
0
Trust Level
49%
Scored at
October 18, 2026

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Principal Silicon Validation Engineer