Quick Summary
As part of a Package Layout team, you will collaborate to implement high speed and PDN design for ASIC packages. Develop symbols, pad stack and perform substrate package routing, placement, stack-up,
B.Sc. Electrical Engineering or any equivalent experience.
NVIDIA have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you.
NVIDIA IC Packaging design team is looking for a Senior IC Packaging Design Engineer to join our package team and focus on delivering and designing state of the art high-speed Interconnect systems for Supercomputers and Datacenters. This position will collaborate with Technical Package Lead and cooperation with different design teams and development of complex, detailed layout of IC substrates for NVIDIA products.
Responsibilities
~1 min read- →
As part of a Package Layout team, you will collaborate to implement high speed and PDN design for ASIC packages.
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Develop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using APD or SiP tools.
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Optimize package pin out incorporating system level trade-offs of pins assignment.
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Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations.
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In close co-operation with the SI/PI/HW design teams and product teams
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Planning, ensuring stakeholder management and leading projects from start to finish
Requirements
~1 min readB.Sc. Electrical Engineering or any equivalent experience.
Minimum of 5+ years hand-on in Package or/and PCB Layout; including high speed design signal integrity practice; PDN designing and planning
Experience in substrate layout of wire bond and flip chip packages, preferred
Knowledge in substrates or board manufacturing process
Significant background with APD or SiP and/or other PCB layout tools
English communication skills (written and verbal) are required for this role
Knowledge in Ansys (SIwave, HFSS) or Cadence (Sigrity, PowerSI) simulation tools
Familiarity with Skill language (Cadence) and basic parsing abilities (Python/Perl/Shell-scripting)
We are committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
Location & Eligibility
About this job
- Who can apply
- Taiwan
- Posted
- Today
Listing Details
- First seen
- October 19, 2026
- Last seen
- October 19, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 51%
- Scored at
- October 19, 2026
Signal breakdown
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