Quick Summary
DFT logic implementation and verification Maintain DFT flow and run regression Run DFT verification Pattern generation and bringup
DFT focus on strategy definition through logic design and insertion, pre-silicon verification, pattern generation, and ATE bringup for NVIDIA chips, with special emphasis on ATE bringup, pattern/generation and validation, yield debug, failure analysis and volume diagnosis for ramp to production.
As a DFT intern at NVIDIA, you will help own the testing methodology from strategy definition through logic design and insertion, pre-silicon verification, pattern generation, and ATE bringup.
Responsibilities
~1 min read- →DFT logic implementation and verification
- →Maintain DFT flow and run regression
- →Run DFT verification
- →Pattern generation and bringup
Requirements
~1 min read- Strong logic design and verification background
- Possess very basic knowledge of DFT
- Skilled in Perl/tcl programming
- Proficient at Verilog HDL
- Pursuing MS/PhD in EE
- Prefer to have experience with logic simulators and debug tools (such as vcs, ncsim, verdi)
- Familiar with C/C , Makefile is a plus
- Strong problem solving and analytical skills
- Excellent communication skills and teamwork
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!
Location & Eligibility
About this job
- Who can apply
- China
- Posted
- 19 days ago
Listing Details
- Posted
- October 14, 2026
- First seen
- October 20, 2026
- Last seen
- November 2, 2026
Posting Health
- Days active
- 12
- Repost count
- 0
- Trust Level
- 17%
- Scored at
- November 2, 2026
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