EDA Tools Software Engineer

As a member of the PTD Litho Frame Automation Team (FRAT) in LTD (Logic Technology Development), you will be responsible for process design rule definition, construction and validation of lead certification Tape-in Collaterals for Intel's next generation process technology and products. You will be responsible for the validation and creation of VLSI layout that will enable fundamental process development.

Your responsibilities will include but will not be limited to:

• Verify VLSI layout adherence to complex layout design rules, specifically ownership in Quality Assurance of FRAT designs across all Intel process nodes
• Troubleshoot design and PDK(Process Design Kit) verification issues with complex physical design flows, both industry standard and Intel tools and flows
• Write/update software code for cell design and testcases, verification and package design content for distribution
• CAD design development and support of LTD Tape-in Collateral Library for ALL Intel Process Technology nodes including CR experimental Path Finding projects
• Collaborating, directing, extracting, executing designs and constructs that will be used for process implementation, monitoring, improvement and development well ahead of any other team in LTD. This interaction will be with a very diverse team including Litho, Integration, Device, Test Chip, Tape Out, and OPC and RET (Reticle Enhancement Team) experts. These designs will be used during development, refined and then made available for HVM (High Volume Manufacturing)

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 6+ months of hands-on experience in the domain and demonstrated skills gained through internships, academic projects, coursework, or hands-on training

OR

• Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with no prior professional experience
• Hands-on experience includes:
  • Coursework and background should include VLSI design or CAD, programming in Python or C++, Semiconductor Device Physics or basic electrical circuit theory, Silicon manufacturing flows

• Familiarity with semiconductor processing/engineering or computer science (from coursework or internship or work experience)
• VLSI Circuit mask design layout and/or verification (from coursework or internship or work experience)
• Basic solid-state physics, optics and IC (Integrated Circuit) process flow (from coursework or internship or work experience)
• Programming skills in a high-level programming language (from coursework or internship or work experience)
• Familiarity with UNIX/Linux platforms (from coursework or internship or work experience)
• Experience with Cadence Virtuoso, Klayout, and tools such as Calibre DRV or Calibre
• Knowledge of design rule checks (DRC), ICV, or IC Validator software tools
• Experience with custom design and verification tools, debugging, and flow development
• Strong communication and collaboration skills for cross-functional teamwork
• Proactive mindset with a focus on continuous improvement and learning

For information on Intel’s immigration sponsorship guidelines, please see Intel U.S. Immigration Sponsorship Information

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