Quick Summary
Functional and IO IP development Different IPs integration and release for custom silicon Build SOC or sub-system,
Functional and IO IP development Different IPs integration and release for custom silicon Build SOC or sub-system,
NVIDIA NVLink™ Fusion delivers industry-leading AI scale-up and scale-out performance with NVIDIA technology plus semi-custom ASICs or CPUs . NVIDIA is hiring a Custom Silicon Design Engineer to design, analyze, and evolve next generation NVLINK Fusion product. We are looking for special individuals with passion and desire to deliver innovative products. Together, we will build the next generation of life changing SoC's. If you are a motivated individual that understands how SoC systems are architected and built, has intimate knowledge of client requirements, and understands various development cycles, this is your place to be.
Responsibilities
~1 min read- →Functional and IO IP development
- →Different IPs integration and release for custom silicon
- →Build SOC or sub-system, signoff function/performance and QoR
- →Methodology improvement for high-efficiency custom silicon development
Requirements
~1 min read- Masters degree in EE/CS or related field
- Basic C/C++ knowledge is a must
- Scripting knowledge (Perl/Python/Shell)
- Basic digital circuit/verilog knowledge is a must
- Basic verification knowledge is a must
- Quick learner, willing to take challenges in a new field
- Fluent English and good communication skills
- Familiar with VCS, system Verilog and UVM
- Background with ASIC design flow, like synthesis
- Familiar with AMBA protocols such as AXI, ACE, CHI, ATB, etc.
Location & Eligibility
About this job
- Who can apply
- China
- Posted
- 9 days ago
Listing Details
- Posted
- October 29, 2026
- First seen
- October 29, 2026
- Last seen
- November 6, 2026
Posting Health
- Days active
- 8
- Repost count
- 0
- Trust Level
- 26%
- Scored at
- November 7, 2026
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