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HBM SIPI, Senior Engineer

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Quick Summary

Key Responsibilities

* Signal integrity channel analysis for 2.5D and 3D silicon interposer — including frequency-domain characterization (insertion loss, return loss, PSXT,

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Req. ID: JR115374 HBM SIPI, Senior Engineer Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever ! The Heterogeneous Integration Group (HIG) is a division within the Innovation, Technology & Products (TPG). We are dedicated to developing and optimizing High Bandwidth Memory (HBM) solutions for AI and ML applications. Using Through Silicon Via (TSV) technology, we stack multiple DRAM chips with a high-speed interface die, significantly increasing memory density and bandwidth for next-generation AI/ML accelerators and high-performance computing platforms. Our designs target the industry's lowest power-per-bit and highest bandwidth, enabling the most demanding compute workloads. We are seeking a SI/PI Engineer in HBM Build Architecture to develop high-quality SI/PI analysis for interposers, packages, and silicon channels. This work contributes directly to HBM build sign-off and product success. You will be involved in complex, multi-disciplinary SI/PI initiatives spanning multiple HBM product generations — from early interposer channel analysis and equalization co-design, PDN architecture, and system PI analysis. You will ensure Micron's HBM SI/PI architecture remains the industry benchmark for signal quality, power delivery integrity, and interface reliability. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities will include, but are not limited to: * Signal integrity channel analysis for 2.5D and 3D silicon interposer — including frequency-domain characterization (insertion loss, return loss, PSXT, IL-to-XT ratio) and time-domain analysis (eye diagram, BER, jitter decomposition) * Conduct mask‑based timing analysis using time‑domain simulations (e.g., SPICE, ADS). * Support power integrity and PDN analysis, including impedance modeling and transient response analysis. * Electromagnetic extraction and modeling of signal and power delivery channels (PCB, Package, Interposers, etc.). * Automate sign-off processes and work with EDA suppliers to improve tool accuracy and analysis flow. Minimum qualifications * 3 years of experience in signal integrity (SI) and power integrity (PI) modeling and analysis. * Deep understanding of SI/PI, electromagnetic and transmission line theory, I/O design. * Experience in circuit simulation such as Keysight ADS and Synopsys HFSS. * Use AI/ML/LLM for productivity or efficiency Preferred qualifications * 5+ years of experience in signal integrity and power delivery network (PDN) modeling and analysis. * Experience in SI/PI modeling and analysis for 2.5D/3D advanced packaging (CoWoS, EMIB, interposer-based designs), including time-domain analysis (eye diagram, BER, jitter decomposition, PDN) and frequency-domain characterization (S-parameters, PDN impedance) * Experience with mask-based timing budget and jitter analysis with time-domain simulation (SPICE, ADS, etc) * Experience with high-speed interfaces such as DDR, HBM, UCIe, PCIe, and SERDES. * Proficiency in simulation and analysis using industry-standard EDA tools, including ANSYS HFSS/SIwave, Keysight ADS, Synopsys HSPICE, Cadence PowerSI/PowerDC. Job Profile(s): Systems Design Engineer 2 - Systems Design Engineer 4 Relocation level: (TBD) Before Getting Started Please review Micron’s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that: * Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence. * If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process. ​​​​ As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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About this job

Posted
Today
Employer
has 30 open jobs on Jobera.

Listing Details

Posted
October 30, 2026
First seen
October 30, 2026
Last seen
October 30, 2026

Posting Health

Days active
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Trust Level
56%
Scored at
October 30, 2026

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HBM SIPI, Senior Engineer