Power Delivery Integration and Power Rail Stress Engineer- SoC Power Thermal Performance Validation Engineer (Temporary position)

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QA & TestingValidation Engineer

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Requirements Summary

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position. Bachelor’s degree in Electronics, Electrical, Computer Engineering,

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QA & TestingValidation Engineer

As a SoC Power Thermal Performance Validation and Optimization Engineer, you will play an essential role in ensuring Intel's products achieve optimal power, thermal, and performance benchmarks at the system-on-chip (SoC) level.

In this position, you will develop and execute validation methodologies, optimize hardware/software solutions, and perform SoC-level debugging to address power, thermal, and performance challenges. Your contribution will directly impact Intel's ability to deliver competitive, high-performing products to market.

Responsibilities

~2 min read

→Develop and execute System-on-Chip (SoC)-level power delivery, Power Rails Stress (PRS), maximum current (ICCmax), current transient (di/dt), minimum/maximum voltage (Vmin/Vmax), Digital Linear Voltage Regulator (DLVR)/Fully Integrated Voltage Regulator (FIVR), and concurrency plans, including feasibility study and design/verification/simulation of the Power Distribution Network (PDN) and sign-off of IR-drop/Electromigration (IR/EM) metrics, across Intel products.
→Collaborate with architecture, design, firmware, software, Power Management architects, and layout teams to ensure power delivery meets competitive targets and specifications and to define and implement power gating solutions.
→Establish and execute methodologies for validating hardware/software optimizations and to converge the design on all Power Distribution Network (PDN) metrics, ensuring alignment with business Key Performance Indicators (KPIs).
→Perform System-on-Chip (SoC)-level debug to identify root causes and resolve functional and triage failures related to power delivery, on-die power grid/network, thermal, and performance.
→Configure and set up data loggers to collect and analyze power/thermal data, and work with the package integration team to ensure the complete IP system meets the design specification.
→Develop and maintain validation infrastructure (performance monitors, behavioral checkers, and testing environments) and work with the post-silicon debug team to triage, debug, and fix potential Power Distribution Network (PDN) issues.
→Produce comprehensive validation reports summarizing activities and results and communicate findings effectively with relevant teams.
→Drive continuous improvements to validation strategies, methodologies, and processes.

Strong analytical and problem-solving skills.
Effective communication and documentation skills for cross-functional collaboration.
Advanced teamwork to work across teams in multi-faceted groups (architecture, design, verification, firmware, software, and platform teams).

Requirements

~1 min read

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.