Senior Signal Integrity and Power Integrity Engineer

The Signal Integrity/Power Integrity (SIPI) team is a centralized SIPI resource within Waymo. The team is responsible for ensuring that all electrical designs meet functional SI and PI performance metrics before they progress to production. The team covers a variety of designs including silicon package, PCB, connector and cabling systems, which serve as core parts of computing modules and sensor suites in our autonomous driving systems. 

Acting as a critical bridge between schematics and layout, the team rigorously evaluates circuit designs, layout and integration constraints, along with hardware prototypes through structured simulation plans, data-driven analysis, and industry-standard validation methodologies.

• Lead SI and PI design across assigned hardware projects, including lidar, camera, compute modules, and custom silicons
• Deliver end-to-end results from pre-layout feasibility study, post-layout simulation to post-fab correlations
• Define SI and PI acceptance criteria and partner with bench validation teams to root-cause and resolve SI and PI related issues
• Review and direct vendor design and simulation workflows where applicable
• Identify design risks and drive cross-functional solutions in collaboration with EE, PCB layout, Firmware and Mechanical teams

• Masters Degree in Electrical Engineering with 3+ years relevant working experience
• Be able to perform SI and PI simulation softwares such as Ansys HFSS, SIwave, PowerSI, ADS, HSPICE. Familiar with working with IBIS AMI models
• Understand PI fundamentals. Be able to perform power-noise-aware SI analysis
• Familiar with lab equipment such as VNA and TDR, demonstrated experience with simulation-to-measurement correlation and solving real-world SIPI problems.
• Excellent communication skills with experience to collaborate with internal and external teams
• Depending on the project, be able to work with overseas team (east Asian time zone)

• Ph.D. in Electrical Engineering or relevant field with 3+ years relevant working experience
• Familiar with substrate and PCB design rules, stackups, materials selection and HDI process. Has experience with the package-board co-design process
• Deep understanding in one or more of the following areas: SERDES, LPDDRx, or  >200A  PDN design
• Experience in root-cause analysis and debugging of real-world SI and PI  hardware issues
• Experience with DoE simulation for high-volume production intended designs