boeing
boeing4d ago
New
USD 98600-133400/yr

ASIC / FPGA Digital Design Engineer – (Associate or Experienced)

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OtherDigital Design Engineer
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Quick Summary

Overview

ASIC / FPGA Digital Design Engineer – (Associate or Experienced) Company: Boeing Space,

Technical Tools
OtherDigital Design Engineer
ASIC / FPGA Digital Design Engineer – (Associate or Experienced)

Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ASIC/ FPGA Digital Design Engineers – (Associate or Experienced) to join us as part of our Boeing Electronic Products team at the heart of Boeing’s products to support advanced digital subsystem development in an aerospace environment in El Segundo or Huntington Beach, CA.  

Engineers may support ASIC, FPGA, or mixed ASIC/FPGA developments depending on program assignment, technical specialization, and organizational needs. Work may include requirements development and capture, architecture support, HDL development, simulation, synthesis, FPGA implementation, timing analysis, integration, troubleshooting, verification collaboration, and traceability activities depending on role level and assignment scope.

Programs, Products, & Growth Opportunities

Engineers contribute to advanced aerospace and defense programs spanning space, aviation, communications, and autonomous systems. Programs may include next-generation satellite and space systems, modules supporting NASA missions, Space Launch System (SLS)-related technologies, commercial and military aircraft platforms, autonomous aviation technologies, and emerging digital architectures supporting future aerospace systems.

Engineers support a broad portfolio spanning ASICs, SoCs, and FPGAs across multiple concurrent aerospace and defense programs. Collaborations within the broader organization include space and satellite efforts, commercial and military aviation programs, and autonomous aviation initiatives involving organizations such as Millennium Space Systems and Wisk Aero.

Department expertise spans requirements development, architecture activities, RTL design, ASIC development, FPGA implementation, timing analysis, verification collaboration, integration support, and system-level troubleshooting.

Engineers have opportunities to broaden across conceptual architecture, requirements development, HDL ownership, FPGA implementation, timing analysis, verification collaboration, subsystem development, and integration activities while deepening selected technical specialties over time. The organization intentionally supports growth from focused contributors toward broader technical ownership, subsystem responsibilities, mentorship, and technical leadership roles as experience develops.

Teams are intentionally composed of engineers with complementary strengths spanning architecture, implementation, verification, integration, timing, and troubleshooting. The role is not intended to imply that every engineer must simultaneously be an expert in all disciplines.

Responsibilities
• Support ASIC, FPGA, or mixed ASIC/FPGA developments depending on assignment
• Contribute to requirements development, refinement, interface definition, conceptual architecture activities, and traceability efforts appropriate to role level
• Develop HDL / RTL for ASIC, FPGA, and SoC systems
• Compile, simulate, debug, and troubleshoot digital designs
• Perform and/or support synthesis, implementation, constraints development, timing closure, and tool execution activities
• Collaborate with verification teams to support simulation, debug, coverage, and integration goals
• Apply timing concepts, CDC fundamentals, and integration considerations
• Support broader system troubleshooting and integration activities
• Communicate technical status, risks, dependencies, and tradeoffs proactively

Behavioral Expectations
• Operate with ownership appropriate to role level
• Independently manage assigned scope and execution
• Develop technical breadth while deepening selected expertise
• Support peer development and technical collaboration
• Build systems awareness beyond immediate design boundaries
• Contribute to technical leadership activities appropriate to level

Associate, Level 2
• Independently manage assigned technical scope and execution responsibilities
• Rapidly develop RTL, simulation, debug, timing, implementation, and integration skills while building broader systems awareness
• Participate in requirements refinement, traceability, and integration activities appropriate to experience level

Experienced, Level 3
• Own blocks or functional areas
• Contribute to requirements development, interface definition, implementation support, and technical closure
• Support integration and cross-functional troubleshooting activities
• Lead teams, subsystem efforts, and cross-functional initiatives
 

Requirements

~1 min read
    • Successful candidate for this job must satisfy the Company’s Conflict of Interest (COI) assessment process.

      This position offers relocation based on candidate eligibility. Note: Basic relocation will be offered for eligible internal candidates.

      Not Applicable

Boeing is a Drug Free Workplace where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies.

This position is for 1st shift.

At Boeing, we strive to deliver a Total Rewards package that will attract, engage and retain the top talent. Elements of the Total Rewards package include competitive base pay and variable compensation opportunities.  

The Boeing Company also provides eligible employees with an opportunity to enroll in a variety of benefit programs, generally including health insurance, flexible spending accounts, health savings accounts, retirement savings plans, life and disability insurance programs, and a number of programs that provide for both paid and unpaid time away from work.  

The specific programs and options available to any given employee may vary depending on eligibility factors such as geographic location, date of hire, and the applicability of collective bargaining agreements.

Pay is based upon candidate experience and qualifications, as well as market and business considerations.

Summary pay range for Associate, (Level 2): $98,600 - $133,400

Summary pay range for Experienced, (Level 3): $119,850 - $162,150

Bachelor's Degree or Equivalent

This position offers relocation based on candidate eligibility.

This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim and/or final U.S. Secret Clearance Post-Start is required.

Employer will not sponsor applicants for employment visa status.

This position is not contingent upon program award

Shift 1 (United States of America)

Location & Eligibility

Where is the job
Location terms not specified
Who can apply
Same as job location

Listing Details

Posted
September 4, 2026
First seen
September 8, 2026
Last seen
September 8, 2026

Posting Health

Days active
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Repost count
0
Trust Level
49%
Scored at
September 8, 2026

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boeingASIC / FPGA Digital Design Engineer – (Associate or Experienced)USD 98600-133400