Embedded Hardware Security Research Engineer
Quick Summary
Bachelor’s degree in Electrical Engineering, Computer Engineering, Cybersecurity Engineering, Physics, or Mathematics, and 5 years direct experience, through courses or previous
Riverside Research is seeking an mid-level Embedded Hardware Security Research Engineer to work alongside our US Air Force (USAF) and Department of Defense (DoD) partners to develop tamper-protected microelectronic devices and intellectual property (IP). This position is an mid-level engineering role that provides a technical path and opportunity to become a Subject Matter Expert (SME) role in the understanding of advanced attacks against state-of-the-art integrated circuits and the design and development of protective controls to mitigate such attacks. You will work with nationally recognized hardware security experts employing a range of microelectronics test equipment, specialized software, and computing resources to provide exceptional support to our customers. This research work is conducted on-site in Riverside Research’s microelectronics and embedded systems security laboratory in Beavercreek, Ohio.
Responsibilities
~1 min read- →Performs research supporting assessment of state-of-the-art attack effectiveness against various microelectronic devices.
- →Supports development of hardware algorithms for secure microelectronic devices (microcontrollers, FPGAs, etc.).
- →Analyzes secure architectures to identify vulnerabilities.
- →Develops, maintains, adjusts, and reports on project status and timelines.
- →Collaborates with Government research leads to develop and present papers across a variety of DoD conferences and technical interchanges.
- →Supports Principal Investigator and Program Manager in the development and documentation of technical requirements for approved research areas.
- →Interacts with third-party vendors to collect appropriate source information as requested by program, leadership.
- →Documents findings in technical reports and presentations.
- →Develops and presents technical briefings to technical audiences and conferences.
Requirements
~1 min read- Bachelor’s degree in Electrical Engineering, Computer Engineering, Cybersecurity Engineering, Physics, or Mathematics, and 5 years direct experience, through courses or previous employment, or a Master's degree and 3 years direct experience or a PhD without experience.
- Extensive experience developing IP with Verilog, VHDL, or SystemC.
- Previous experience programming microcontrollers or microprocessors.
- Proven knowledge on the design of security features of FPGAs or ASICs.
- Fluency in programming and/or scripting in C, C++, Rust, or Python.
- Previous experience in one or more of the following topics: side channel analysis, physically unclonable functions, reverse engineering, supply chain security, voltage or clock glitching.
- Experience performing statistical analysis and performing data analysis.
- Extensive experience using lab equipment (oscilloscopes, power supplies, etc.).
- Proven ability to work semi-independently on assigned tasks with limited scope and with technical supervision in a highly collaborative team-based R&D environment.
- Experience in creating technical reports, developing research papers and presentations supporting research areas.
- Willing to travel a few times per year.
- An active Secret clearance is required to start and a Top Secret clearance and additional program approvals must be obtained and maintained for this position.
- PhD in Electrical Engineering, Computer Engineering, Cybersecurity Engineering, Physics, or Mathematics
- Active security clearance.
- Previous experience applying microelectronics to one or more of the following areas: Signal Processing, RF, Secure Communications, Machine Learning, Software Verification, or Cybersecurity
- Understanding of cryptographic algorithms and protocols, or their implementation in embedded technologies including microcontrollers, FPGAs, ASICs.
- Familiarity implementing hardware attacks including side-channel, glitching, and their countermeasures.
- Familiarity using Virtual Machines (VirtualBox, VMWare, WSL, etc.), Linux OS, and other virtualization techniques
- Understanding of sub-100 nm CMOS and FinFET device fabrication, assembly, and packaging including 3DICs.
Location & Eligibility
Listing Details
- Posted
- October 9, 2026
- First seen
- October 9, 2026
- Last seen
- October 10, 2026
Posting Health
- Days active
- 0
- Repost count
- 0
- Trust Level
- 67%
- Scored at
- October 10, 2026
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