Senior Out-of-Order CPU Architect

The Role and Impact
As a CPU Architect, you will be at the forefront of Intel's innovation, shaping the future of CPU designs for high-performance computing and low-power products. This role is integral to Intel's mission to deliver cutting-edge solutions that power the world's technology, from advanced data centers to everyday consumer devices. You will play a pivotal role in driving end-to-end CPU architecture specifications, ensuring optimal performance, power efficiency, scalability, and interoperability across hardware and software. Through creative problem-solving and collaboration, you will influence cross-functional roadmaps, define technology targets, and deliver revolutionary CPU architectures that meet diverse market requirements.

Key Responsibilities

• Develop and drive end-to-end CPU architecture specifications based on hardware features, requirements, and lifecycle needs.
• Define CPU targets for performance, power, frequency, area, and feature content to align with market requirements.
• Explore new approaches and devise novel architectures that deliver optimized CPUs for multiple segments, from high-performance computing to extreme low-power applications.
• Invent, conceptualize, and specify architectural and microarchitecture features that address future CPU usage and segment needs.
• Define and document new instructions to support innovative use cases and improve existing ones, enhancing the instruction set architecture (ISA).
• Develop and execute test plans and infrastructure for new architectures/features, simulate functional models, and analyze test results using advanced statistical techniques.
• Propose experimental changes and design alternatives to meet constraints for performance, power, area, and timing.
• Capable of, but not often required to in your role, of directly implementing your microarchitectural specifications in system verilog. If designers require aid in converging timing and/or power constraints, you are expected to be able to do the work yourself and solve the issues quickly.
• Review and influence cross-functional roadmaps and collaborate with architects, design, verification, and validation engineers during project execution.
• Drive definition of new microarchitectures and identify mitigations for issues during feature implementation to improve CPU designs.
• Expertise in CPU architecture fundamentals, microarchitecture design, low-power design, RTL development, and System Verilog.
• Proven ability to debug microarchitecture and simulation issues and solve complex design problems.

Minimum Qualifications

• 15+ consecutive years of experience within high performance/high frequency ARM or x86 CPU organizations working in either the design or architectural domain. Ideally both.
• 10+ years of experience working within the out-of-order sections of the CPU pipeline. This includes the areas of wide instruction rename and allocation, uop/instruction schedulers, and execution units.
• 5+ years writing RTL and owning it through timing and power convergence across multiple generations of a CPU line.
• 2+ years of experience building deep, high frequency advanced integer and/or floating-point/vector schedulers.

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