Senior Principal Engineer, Device Design

3 Locationssenior

Other

1 views0 saves0 applied

Apply Now

Quick Summary

Key Responsibilities

Technical Strategy and Architecture Leadership: Lead cross-functional, multi-disciplinary teams in defining base and derivative semiconductor architectures-including advanced transistors,

Requirements Summary

Drive the development and implementation of customized semiconductor features across logic and memory technologies,

Technical Tools

Other

Intel is transforming from an Integrated Device Manufacturer (IDM) to a leading global foundry service provider, offering world-class manufacturing capabilities to external customers worldwide. Our Manufacturing Development and Customer Engineering (MDCE) organization is at the forefront of this transformation-focusing on technology customization, yield improvement, performance optimization, and exceptional customer delivery.

About the Role

~1 min read

Progressive experience in the semiconductor industry with a strong focus on CMOS device physics, device design, and semiconductor technology development.
Leadership and Technology Integration: Demonstrated technical leadership within the semiconductor industry, specifically leading cross-functional teams to define, develop, and deliver advanced semiconductor technologies (covering logic, memory, or integrated architectures) and design rules into High-Volume Manufacturing (HVM).
Design Rule Governance: Deep proficiency in design rule development, validation, and waiver management processes, with a strong understanding of how layout constraints impact product yield.
Data and Analytical Mastery: Proven expertise in statistical data analysis, Design of Experiments (DOE), and data interpretation to evaluate test chip, E-test, and yield trends.

Requirements

~1 min read

Advanced and Specialty Node Expertise: Architectural experience in advanced-node transistor design and scaling, with deep experience in specialized semiconductor customization for low-power, analog, mixed-signal, and memory technologies.
Physical Verification and Mask Flows: High-level familiarity with physical verification flows, Design Rule Checker (DRC) development, and mask generation concepts.
Manufacturing and SPC: Extensive experience in a High-Volume Manufacturing (HVM) environment with a focus on statistical process control (SPC) and yield monitoring.
Executive Communication: Exceptional verbal and written communication skills, with a demonstrated ability to influence executive stakeholders and guide collaborative partners through complex technical trade-offs.

Master's degree in Electrical Engineering, Physics, Material Science, or a related field. PhD preferred
15+ years of relevant semiconductor device and technology development experience.

Experienced Hire

Shift 1 (United States of America)

US, Oregon, Hillsboro

US, Arizona, Phoenix, US, California, Santa Clara

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

What We Offer

~1 min read

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $265,480.00-374,800.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Location & Eligibility

Where is the job

Not specified

Location terms not specified

Who can apply

Same as job location

About this job

Pay per year: $265,480–$374,800 a year; 370% above the $68,100 median for Other jobs on Jobera (138,593 salaries).
Posted: Today
Employer: has 1,490 open jobs on Jobera in 15 countries.