CPU Power Modeling & Characterization Engineer (Sr Engineer)

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Looking for a CPU Power Modeling Engineer to work on high‑performance, low‑power CPU clusters (CPUSS / NCC) across pre‑silicon and post‑silicon phases.

The role focuses on DPM/EMON‑based power modeling, event‑to‑energy correlation, and power‑performance tradeoff analysis .

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  Develop CPU power models based on architectural micro‑events, PMU/EMON counters, and DPM frameworks

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  Build unconstrained vs HW‑limited CPU power models, incorporating Limiters, DVFS, temperature and throttling behavior.

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  Model dynamic power, leakage, and rail‑specific behavior.

• Drive DPM weight characterization using simulation, emulation, and silicon data across representative workloads.

• Correlate CPU event counts vs measured silicon power, debug gaps. 

• Enhance DPM coverage by adding new CPU events and diags .