BootROM Lead Architect

As the BootROM Architecture Lead, you will be responsible for the architecture and development of BootROM and Secondary Bootloader solutions for advanced automotive processors. You will collaborate across hardware, software, and application engineering teams to design scalable, robust, and secure solutions that meet the demanding requirements of microprocessors used in Radar, Audio, Industrial, and Automotive markets.

This role demands deep technical expertise in MPU/MCU architecture, radar hardware/software, system integration, validation, and optimization

• →Define, develop BootROM and Secondary Bootloader architectures aligned with market trends and industry standards.
• →Collaborate with System Design, Security, and Applications teams to translate requirements into detailed specifications.
• →Drive use-case definition and documentation.
• →Architect scalable computing solutions, including multi-core CPUs, DSPs, vision processing, machine learning, and memory hierarchies.
• →Integrate security features such as secure boot, cryptographic accelerators, and trusted execution environments.
• →Ensure seamless system-level integration by working closely with hardware, firmware, and software teams.
• →Conduct power and performance benchmarking, analysis and optimization.
• →Develop strategies to enhance performance, energy efficiency, and thermal management.
• →Define architectural guidelines and best practices for development teams.
• →Lead the definition & development of Boot Validation architecture/strategy and framework
• →Support development and validation cycles of Boot software.
• →Mentor and guide senior architecture team members.
• →Manage subcontractors and external partners.
• →Influence technical and business strategies to improve team productivity and accelerate time-to-market.

• Bachelor’s / Master’s degree in Electrical or Computer Engineering.
• 15+ years of relevant experience.
• Strong background in use-case analysis and system decomposition.
• Expertise in ARM Cortex and/or RISC-V architectures.
• Deep understanding of microprocessor/microcontroller systems, including CPU cores, DSPs, memory, and peripherals.
• Experience in system-level performance optimization, low-power design, and real-time processing.
• Familiarity with high-speed interconnects (DDR, PCIe) and bus protocols.
• Proven ability to collaborate across multidisciplinary teams.
• Strong communication skills—able to engage both technical and executive stakeholders.
• Experience with pre-silicon development (e.g. emulation, simulation).
• Experience in SW development compliant with ISO/SAE-21434 and ASPICE standards

• Experience in media processing, vision, and imaging applications.
• Familiarity with system-level simulation tools and HW/SW co-design.
• Knowledge of machine learning hardware IPs and architectures.
• Understanding of functional safety standards (ISO 26262).
• Experience with Wi-Fi integration and secure wireless communication protocols.

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