8h ago
New
$133,800.00-188,890.00 USD/yr

Process Integration Development Engineer - Defect Metrology

United StatesUnited States·Hillsboromid
Other
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Quick Summary

Key Responsibilities

Owning a segment of the process to ensure adequate metrology is placed to detect and respond to all yield-limiting defects prior to reaching end-of-line sort.

Requirements Summary

You must possess the below minimum qualifications to be initially considered for this position.

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Embark with us on a journey of growth and transformation as we create exceptionally engineered technology and bring AI everywhere. As a valued team member, your adaptability and attention to detail will contribute to our drive for results and relentless pursuit of quality, ensuring we meet our customers' needs with precision.

 

Join us and build on our legacy of innovation and collaboration as we deliver world‑changing technology that improves the life of every person on the planet.

 

Life at Intel: https://jobs.intel.com/en/life-at-intel

 

At Intel's Logic Technology Development (LTD), we have continued to extend Moore's law to be world leaders in computing technology. To achieve the necessary scaling of our semiconductor manufacturing process, we have led the industry in developing enhancements such as strained silicon for carrier transport enhancement, high-k metal gates, FinFETs, and next-generation Gate-All-Around architectures. LTD has been at the center of every new development that has kept Moore's Law moving forward.

Responsibilities

~1 min read
  • →Owning a segment of the process to ensure adequate metrology is placed to detect and respond to all yield-limiting defects prior to reaching end-of-line sort.
  • →Investigate and respond to exclusionary baseline shifts to ensure segment defect health is restored to capable, demonstrated baseline.
  • →Develop new recipes and RFCs as part of New Product Introduction (NPI).
  • →Provide navigation and leadership to meet Intel's yield objectives, utilizing state-of-the-art metrology tools and test vehicles (QTM, Short Loop, etc.).
  • →Organizing and presenting defect summaries to F25, LTD, MDCE engineering teams.
  • →Partnering with Intel Integration, Yield, and failure analysis labs to provide root cause for all defect issues.
  • →Hold the team and collaborators accountable for quality through Integrated Module Team (IMT) and Focus Team (FT) forums.
  • →Work collaboratively as a part of the overall LTD Defect metrology group.
  • →Role-model and establish a team culture of trust, collaboration, safety, accountability, and sustaining excellence.
  • →Build strong relationships with other LTD teams based on mutual trust and respect.
  • Strong data analysis and problem debug skills.
  • Team player with flexibility and adaptability to changing business needs.
  • Strong ownership mindset and driving closure-see the problem, own the problem.
  • Excellent communication and navigation skills to larger audiences.
  • Understand and adhere to Intel cultural values such as Customer First, Fearless Innovation, Results Driven, One Intel, Integrity, Quality, Inclusion.

Requirements

~2 min read

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and internship experience.

Must possess a PhD degree in Computer Science, Physics, Material Science and Engineering, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Nuclear engineering, Optics, or Chemistry (with focus on hands on experimental research)

 

Minimum of 1+ years of experience with one or more of the following:

 

  • Experimental research - designing and conducting experiments, operating equipment (characterization, fabrication, synthesis), analyzing statistical data
  • Materials characterization (SEM, TEM, etc.), materials fabrication, synthesis, metrology, statistical or data analysis (MATLAB, Excel, JMP, etc.)
  • Semiconductor processing fundamentals (lithography, wet and or dry etch, chemical and or mechanical polishing, etc.), semiconductor and or transistor device physics, and design of experiments.
  • Defect metrology, defect improvement, yield improvement, or process integration
  • Demonstrate experience of Statistical Process Control (SPC), or Design of Experiments (DOE) principles
  • Complex problem-solving methodologies - root cause analysis, model-based problem solving (MBPS), 5 Why, Fishbone, etc.
  • Understanding of semiconductor physics or semiconductor processing
  • Understanding of defect metrology tools such as brightfield, darkfield, or voltage contrast (VC)

 

We welcome motivated professionals to bring their expertise and enthusiasm to Intel, where you will have the opportunity to grow your career while helping to shape the future of technology in a collaborative and forward-thinking environment. Apply today to be part of Intel's journey to redefine possibilities.

 

Interview Tips: https://www.intel.com/content/www/us/en/jobs/hiring.html

          

College Grad

Shift 1 (United States of America)

US, Oregon, Hillsboro

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
N/A

What We Offer

~1 min read

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $133,800.00-188,890.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Location & Eligibility

Where is the job
Hillsboro, United States
On-site at the office
Who can apply
US

About this job

Pay per year
$133,800–$188,890 a year
137% above the $68,000 median for Other jobs on Jobera (128,861 salaries).
Who can apply
United States
Posted
Today
Employer
has 1,258 open jobs on Jobera in 15 countries.

Listing Details

Posted
October 28, 2026
First seen
October 28, 2026
Last seen
October 28, 2026

Posting Health

Days active
0
Repost count
0
Trust Level
68%
Scored at
October 28, 2026

Signal breakdown

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Process Integration Development Engineer - Defect Metrology$133,800.00-188,890.00 USD