Senior SOC Architect

• →Hardware architecture end-to-end lifecycle ownership
• →Drive Architecture/Software/Hardware co-design and collaboration on features set
• →Drive the development of predictive and adaptive hardware for improved performance and power
• →Perform performance, perf @ watt, perf / sq. mm modeling or analysis and track through design (where applicable)
• →Hardware specification authoring, review, and architectural model development (where applicable)
• →Architectural validation plan and execution
• →Review downstream specifications and verification plans in ASIC, software and/or platform to ensure requirements are followed   
• →Post-Silicon production support with silicon debug and publishing of customer documentation   
• →Industry standards tracking & 3rd party IP technical evaluation   
• →Patenting novel parts of system architecture   

• Bachelors, Masters or PhD degree in Computer Engineering, Electrical Engineering (or equivalent experience)   
• 12+ years of architecture, design and/or verification experience   
• Proven experience driving architectural features from concept, definition, and modeling through implementation and productization   
• Strong system level thinking, with the ability to translate architectural ideas into practical hardware features
• You have meaningful industry expertise in SoC architecture definition in for example: Clocks, Resets, Interconnects, Memory Controller, Boot, Virtualization, Power Management, Security, System Performance, IO technologies, (PCIE, Camera Interfaces, etc), Multimedia accelerator pipelines, CPU/GPU coherency, Platform integration   
• Comfortable communicating and solving issues at all levels of architecture definition from micro-architecture to system level to software architecture   
• Excellent analytical, written, and verbal interpersonal skills and ability to work as part of a team   

• Deep understanding of power and performance modeling knowledge and experience   
• Experience translating AI/ML or heuristic algorithms into practical hardware features for prediction, control, power management, or performance optimization
• Experience defining predictive or adaptive hardware features for runtime decision-making
• Experience in power management architecture and runtime power-control features is a strong advantage
• Experience working with data scientists to turn models into deployable hardware solutions under power, area, and latency constraints   
• Inventions in one or more domains relevant to SoC architecture   

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