6h ago
New

SOC logic design engineer

United StatesUnited States·Prescottmid
EngineeringDesign Engineer
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Quick Summary

Requirements Summary

Minimum Qualifications - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related

Technical Tools
EngineeringDesign Engineer

The Role and Impact As a SoC Logic Design Engineer, you will play an integral role in developing and optimizing the logic design for cutting-edge System-on-Chip (SoC) solutions. Your day-to-day work will focus on creating register transfer level (RTL) code, performing simulations, ensuring design quality, and integrating IP blocks and subsystems into complete SoC or discrete component designs. By contributing to design architecture and microarchitecture features, you will help deliver innovative solutions that meet stringent power, performance, and timing goals, making a tangible impact on Intel's advanced technologies. Business group You will join the Data Center Group (DCG), Intel's dynamic team driving innovation in data-centric technologies. As part of this group, you will contribute to the design and development of solutions that power the computing infrastructure behind modern businesses and society. DCG focuses on enabling high-performance, scalable, and secure platforms, ensuring Intel remains at the forefront of data center advancements. Key Responsibilities - Develop RTL code and perform simulations for SoC designs, ensuring design accuracy and quality. - Integrate IP blocks and subsystems into a full-chip SoC or discrete component designs. - Collaborate on defining architecture and microarchitecture features for SoC blocks. - Conduct quality checks on RTL, timing, power convergence, and physical implementation integrity. - Optimize logic designs to meet power, performance, area, and timing requirements. - Review verification plans to ensure design features meet specifications and resolve any failing RTL tests. - Follow secure development practices to address security threats and objectives within the design. - Work with IP providers to integrate and validate IPs at the SoC level. - Drive quality assurance compliance for seamless IP-SoC handoffs.

Requirements

~1 min read
Minimum Qualifications - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 0-1 years of hands-on experience in SoC logic design, demonstrated through internships, academic projects, coursework, or hands-on training. - Proficiency in RTL design using SystemVerilog and Verilog. - Strong understanding of digital design fundamentals, including logic design, clock domain crossing, and power gating. - Familiarity with SoC architecture, microarchitecture, and integration principles. Preferred Qualifications - Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with no prior professional experience. - Experience with verification and testbench writing for SoC designs. - Knowledge of clocking structures, SoC clocking, and topologies. - Ability to perform technical documentation and effectively communicate across cross-functional teams. We are looking for talented individuals ready to shape the future of technology. If you are excited to work on groundbreaking designs and contribute to the next generation of computing solutions, we encourage you to apply and grow your career with Intel.

          

College Grad

Shift 1 (China)

PRC, Beijing

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
N/A

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Location & Eligibility

Where is the job
Prescott, United States
On-site at the office
Who can apply
US

Listing Details

Posted
October 12, 2026
First seen
October 12, 2026
Last seen
October 12, 2026

Posting Health

Days active
0
Repost count
0
Trust Level
56%
Scored at
October 12, 2026

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SOC logic design engineer