13h ago
New

SR ENGINEER, DESIGN

ItalyItaly·Avezzano (aq)senior
EngineeringEnergy Design Engineer
2 views0 saves0 applied

Quick Summary

Key Responsibilities

• Own end-to-end RTL-to-GDSII physical implementation for complex digital blocks and subsystems using automated place-and-route flows. • Develop and optimize floorplans, power distribution networks,

Technical Tools
EngineeringEnergy Design Engineer

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.


Design/Senior Design Engineer – Auto Place & Route / Digital Implementation (NVE Engineering)

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.


Department Introduction

The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital, and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with cross-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes.


Position Overview

As a Digital Implementation / Auto Place & Route Engineer in the NVEG organization at Micron Semiconductor Italia, you will drive the physical implementation of advanced NAND Flash digital designs from synthesized netlist through tape-out.

In this role, you will own block- and subsystem-level implementation, including floorplanning, power planning, placement, clock tree synthesis, routing, optimization, and physical sign-off. You will partner with RTL, verification, DFT, analog, custom layout, CAD, and product teams to achieve performance, power, area, reliability, and schedule targets.


Responsibilities

Responsibilities include, but are not limited to:

• Own end-to-end RTL-to-GDSII physical implementation for complex digital blocks and subsystems using automated place-and-route flows.

• Develop and optimize floorplans, power distribution networks, placement, clock tree synthesis, routing, and post-route optimization strategies.

• Drive timing closure across multi-mode, multi-corner scenarios through constraint development, static timing analysis, ECO implementation, and working directly with logic designers.

• Perform and resolve physical sign-off checks, including DRC, LVS, antenna, signal integrity, congestion, IR-drop, electromigration, and power analysis.

• Collaborate with RTL, DFT, analog, custom layout, CAD, package, and verification teams to ensure robust integration and tape-out readiness.

• Develop scripts, metrics, and reusable methodologies to automate implementation flows, improve quality of results, and reduce turnaround time.


AI Enablement and Productivity

The candidate is expected to leverage AI-powered tools and data-driven methodologies to improve engineering productivity, accelerate problem solving, support design analysis, and enhance technical decision making. Responsibilities may include:

• Using AI-assisted engineering tools for script generation, review, debug, and documentation.

• Applying AI-enabled analysis to timing, congestion, power, routing, and physical verification datasets.

• Finding opportunities to automate repetitive implementation, reporting, and debug activities.

• Evaluating emerging AI capabilities to improve flow efficiency, predictability, and quality of results.

• Collaborating with multi-functional teams to integrate AI automated workflows into digital implementation activities.


Minimum Qualifications

• M.S. or Ph.D. in Electrical Engineering, Electronics, Computer Engineering, or a related field.

• Hands-on experience with digital physical design and automated place-and-route flows for complex ASIC, SoC, or memory designs.

• Proficiency with industry-standard implementation and sign-off tools (e.g., Cadence Innovus/Tempus or Synopsys Fusion Compiler/IC Compiler II/PrimeTime).

• Strong understanding of floorplanning, clock distribution, timing closure, low-power design, signal integrity, and physical verification.

• Experience with scripting and flow automation using Tcl, Python, Perl, or equivalent languages.

• Strong problem-solving, documentation, and communication skills, with the ability to work effectively in global multi-functional teams.


Preferred Qualifications

• Experience with NAND Flash, other non-volatile memories, or large mixed-signal SoCs, including integration of digital blocks with custom and analog macros.

• Experience with advanced technology nodes, hierarchical implementation, low-power techniques, ECO flows, and tape-out/sign-off closure.


The base salary range that Micron estimates it could pay in for this position full-time is:

43.000,00 € - 74.000,00 € per year, with B3 CCNL Level.

Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for the position. 

 

In addition to base pay, the remuneration package also includes: eligibility for a variable plan subject to the personal achievement of objectives and the company's performance, and benefits, which -at the discretion of the company- currently include meal vouchers, corporate welfare, yearly allowance of remote working days, supplementary health insurance, life coverage, Employee Assistance Program. Please refer to this page to check our current benefit offering: EMEA Benefits

Requirements

~1 min read

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® brand. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.

To learn more, please visit micron.com/careers

Location & Eligibility

Where is the job
Avezzano (aq), Italy
On-site at the office
Who can apply
IT

Listing Details

Posted
October 12, 2026
First seen
October 12, 2026
Last seen
October 12, 2026

Posting Health

Days active
0
Repost count
0
Trust Level
51%
Scored at
October 12, 2026

Signal breakdown

freshnesssource trustcontent trustemployer trust
Newsletter

Stay ahead of the market

Get the latest job openings, salary trends, and hiring insights delivered to your inbox every week.

A
B
C
D
Join 12,000+ marketers

No spam. Unsubscribe at any time.

SR ENGINEER, DESIGN