Semiconductor Package Design Engineer
Quick Summary
The primarily responsible for design of advanced semiconductor packages, including both ceramic and organic substrates, including layout, parasitic extraction, and optimization Work with IC design,
Allegro Package Designer Plus (APD+) tools for designing the package and generating artwork for fabrication.
Responsibilities
~1 min read- →The primarily responsible for design of advanced semiconductor packages, including both ceramic and organic substrates, including layout, parasitic extraction, and optimization
- →Work with IC design, system design, package Signal Integrity (SI)/Power Integrity (PI) & thermal engineering teams to design custom interposer and substrates
- →Work with SoC design teams to optimize die floorplan, bump patterns and interposer / substrate stack up
- →Work with IC design team to define IC package requirements
- →Design package layout using standard CAD tools
- →Extract package parasitics and conduct PI/SI analysis
- →Documentation and release in appropriate archival system
Nice to Have
~1 min readLayout:
- Allegro Package Designer Plus (APD+) tools for designing the package and generating artwork for fabrication.
Analysis:
- Celsius PowerDC (IR Drop)
- Sigrity Advanced SI II: Analysis tools for Signal integrity of parallel busses ( DDRx) and serial links (PCIe Gen x), including Package and PCB effects
- Sigrity Advanced PI II: Power Integrity tools ( IR drop, Impedance Profile, capacitor optimization) including Package and PCB effects
RF / Microwave Design
- AWR, Momentum and HFSS Software Circuit, system, and EM simulation for RF/microwave product development
Requirements
~1 min read- Bachelors degree in Electrical Engineering, Mechanical Engineering, or other semiconductor packaging related discipline.
- 8 to 10 years of experience in semiconductor packaging design, modeling, and simulations
- Strong authority on Cadence Allegro Package Designer Plus (APD+)
- Experience on interposer and substrate layouts and design in advanced package technologies
- Experience with 2.5D, 3D package design
- Experience with design teams on floor plan, bump and layout optimization
- Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated
- Record of success in cross-functional team environment
- Good experience with SI/PI tools for package level extraction/simulation
At Micross, our Core Values of integrity, communication, teamwork, quality and execution, self-discipline and accountability are cultivated throughout all levels of the organization. Micross provides a challenging and enjoyable workplace for members and supports the needs of the community.
Micross provides competitive benefits including medical, HSA and FSA plans, dental, vision, company paid basic Life Insurance, Employee Assistance Program (EAP), 401k with employer match, paid leave, vacation, holidays, generous tuition assistance, 529 College Savings, Pet insurance, Legal insurance, and a range of well-being programs available.
Location & Eligibility
Listing Details
- Posted
- August 22, 2025
- First seen
- September 26, 2026
- Last seen
- September 30, 2026
Posting Health
- Days active
- 4
- Repost count
- 0
- Trust Level
- 19%
- Scored at
- September 30, 2026
Signal breakdown
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