Sr. Semiconductor Test Engineer

United States·Austinsenior

EngineeringQa Engineer

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Quick Summary

Overview

Mythic builds AI inference processors based on analog compute-in-memory, an architecture that puts unusual demands on test: analog behavior, process variation,

Technical Tools

EngineeringQa Engineer

Mythic builds AI inference processors based on analog compute-in-memory, an architecture that puts unusual demands on test: analog behavior, process variation, and trim and calibration all matter alongside conventional digital coverage. We are looking for a hands-on test engineer to own production test across the full silicon lifecycle, from bring-up and characterization through Wafer Sort, Final Package Test, and high-volume manufacturing.

You will define how Mythic tests and ships silicon: the methodology, coverage strategy, screening philosophy, and release criteria, and the test programs and infrastructure that put them into practice. You will set strategy and also write code, debug hardware, and dig into manufacturing data yourself, working closely with design, DFT, product engineering, reliability, and manufacturing.

Mythic’s end-to-end production test strategy across Wafer Sort, Final Package Test, characterization, screening, and volume ramp

Test programs for new silicon products, from development and debug through production release and optimization

Test methodology, coverage strategy, screening philosophy, and release criteria

Silicon bring-up, characterization, correlation, guardbanding, and test transfer into manufacturing

Yield and quality analysis: finding systematic failures and escapes and driving them to root cause

Day-to-day technical work with OSATs, foundries, and ATE vendors to deploy and sustain test flows

Tradeoffs across test coverage, cost, test time, quality, and ramp schedule

Infrastructure, automation, and analytics for production test and yield learning

Required qualification

5+ years in semiconductor test engineering, product engineering, or production test development

Hands-on ownership of Wafer Sort and Final Package Test

Developing, debugging, and releasing test programs on ATE platforms in production

Converting and translating test patterns from STIL, WGL, and VCD into ATE-specific pattern formats

Solid grounding in manufacturing test flows, device screening, test coverage, guardbanding, and outgoing quality

Experience taking silicon through bring-up, characterization, yield ramp, and production release

Strong debug skills and fluency with manufacturing test data

Experience working with design, DFT, product, reliability, and operations teams

Preferred qualifications

Testing mixed-signal or analog silicon, including trim and calibration

Experience with AI, accelerator, or high-performance compute silicon

Experience with Advantest, Teradyne, or similar ATE platforms

Probe cards, load boards, hardware interfaces, and test hardware debug

DFT structures such as scan, MBIST, and boundary scan

Managing OSATs and other external manufacturing partners

Scripting, automation, and test-data analysis (e.g., Python, JMP, or yield-analysis tools)

A track record of reducing test time and improving yield and correlation during ramp

What success looks like in your first year

Wafer Sort and Final Test flows are robust, scalable, and released to production

New products move from bring-up to manufacturing with strong coverage and few surprises

Yield issues are caught early and driven to root cause quickly

Test programs are stable, efficient, and built to scale with volume

At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.

Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.

Location & Eligibility

Where is the job

Austin, United States

Hybrid, some on-site time required

Who can apply

About this job

Pay per year: $140,000–$270,000 a year; 58% above the $130,000 median for Qa Engineer jobs on Jobera (629 salaries).
Who can apply: United States
Posted: Today
Employer: has 31 open jobs on Jobera in 3 countries.