~1h ago
New

Manager, Project Management - Chip Design

IsraelIsrael·Tel Avivmid
OperationsProject Manager
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Quick Summary

Key Responsibilities

Development Management: Lead the ASIC development from concept and architecture stages through micro-architecture, design, verification, and physical design until tape-out.

Requirements Summary

Development Management: Lead the ASIC development from concept and architecture stages through micro-architecture, design, verification, and physical design until tape-out.

Technical Tools
OperationsProject Manager

NVIDIA's Switch ASIC group is seeking a top-tier ASIC technical manager to lead the development of our next-generation ASICs. Join us in shaping the future of technology! As an ASIC Project Lead, you will manage the pre-silicon development of NVIDIA's most advanced and complex switch ASICs — from concept to tape-out — and drive the chip through power-on and qualification to production release. You will collaborate with a cross-disciplinary team, interacting with unit-level ASIC, Physical Design, CAD, Package Design, Firmware & Software, DFT, System Design, Analog Design, and other specialized teams.


Responsibilities

~1 min read
  • →Development Management: Lead the ASIC development from concept and architecture stages through micro-architecture, design, verification, and physical design until tape-out.
  • →Post-Silicon Execution: Drive chip power-on, bring-up, and qualification to production release.
  • →Execution Plans: Define and implement execution plans in collaboration with cross-discipline leaders in unit-level, full-chip, physical design, and firmware/software emulation.
  • →Roadmap Definition: Contribute to the definition of NVIDIA's switch ASIC roadmap.

Requirements

~1 min read
  • BS or MS in Computer or Electrical Engineering, or equivalent experience.
  • 10+ overall years of experience in chip design.
  • 5+ years of chip design/verification management experience as a second- or third-level manager, leading organizations of 50+ engineers.
  • Proficiency in RTL design (Verilog), verification (UVM, SystemVerilog), System-On-Chip design/integration flow, and design automation.
  • Strong system view with the ability to collaborate across multiple interfaces.
  • Strong analytical and problem-solving skills.
  • Excellent communication and teamwork abilities.
  • Experience in synthesis and physical design is a plus.

Location & Eligibility

Where is the job
Tel Aviv, Israel
On-site at the office
Who can apply
IL

About this job

Who can apply
Israel
Posted
Today
Employer
has 1,407 open jobs on Jobera.

Listing Details

First seen
October 18, 2026
Last seen
October 18, 2026

Posting Health

Days active
0
Repost count
0
Trust Level
49%
Scored at
October 18, 2026

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Manager, Project Management - Chip Design