25d ago

Senior Mixed Signal Circuit Design Engineer

United StatesUnited States·Santa Clarasenior
EngineeringDesign Engineer
1 views0 saves0 applied

Quick Summary

Key Responsibilities

You will be part of the design and implementation of high-speed interface circuits; Have the chance to create projects including high speed transceivers and high frequency PLLs.

Requirements Summary

MS in Electrical Engineering (or equivalent experience), PhD preferred 4+ years of design experience in CMOS analog / mixed-signal circuit Working knowledge of Cadence custom design tools,

Technical Tools
EngineeringDesign Engineer

We are now looking for a Senior Mixed Signal Design Engineer to be part of the Mixed Signal design team building next generation NVLINK. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. The team is responsible for the development and implementation of high-speed interfaces and analog circuits. Gain hands-on experience taking innovative integrated circuit designs at data rates of 100Gbps and higher from concept through silicon characterization. Come join our dynamic team today!


What you'll be doing:

  • You will be part of the design and implementation of high-speed interface circuits; Have the chance to create projects including high speed transceivers and high frequency PLLs.
  • Become involved in the design, simulation, and verification of mixed-signal circuits; Lead mask designers, provide mentorship for floorplan and layout design.
  • Provide support to the lab characterization of silicon and pursue the challenges of circuit design in deep submicron CMOS.
  • You will take designs through implementation and productizing.
  • Collaborate with multi-functional teams.

What we need to see:

  • MS in Electrical Engineering (or equivalent experience), PhD preferred
  • 4+ years of design experience in CMOS analog / mixed-signal circuit
  • Working knowledge of Cadence custom design tools, circuit simulator, timing analysis tool; Your extensive design experience in Data Converters, Tx, Rx, CDR, PLL for high-speed IO interfaces.
  • Someone who's an exceptional teammate with good interpersonal skills; Validated experience in leading and mentoring designers.
  • In-depth understanding of deep submicron CMOS process and related circuit design issues; Proven experience in silicon bring-up, debugging and use of lab instrumentation is required.
  • Knowledge in system level timing budget, signal integrity, and power integrity is a plus; Experience in Verilog, Matlab, Nanotime is helpful.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until October 16, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Location & Eligibility

Where is the job
Santa Clara, United States
On-site at the office
Who can apply
US

About this job

Who can apply
United States
Posted
25 days ago
Employer
has 3,400 open jobs on Jobera in 29 countries.

Listing Details

Posted
October 13, 2026
First seen
October 18, 2026
Last seen
November 7, 2026

Posting Health

Days active
19
Repost count
0
Trust Level
14%
Scored at
November 7, 2026

Signal breakdown

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Senior Mixed Signal Circuit Design Engineer